V. T. S. Dao

Toward 100 Mega-Frames per Second: Design of an Ultimate Ultra-High-Speed Image Sensor

Our experience in the design of an ultra-high speed image sensor targeting the theoretical maximum frame rate is summarized. The imager is the backside illuminated in situ storage image sensor (BSI ISIS). It is confirmed that the critical factor limiting the highest frame rate is the signal electron transit time from the generation layer at the back side of each pixel to the input gate to the in situ storage area on the front side. The theoretical maximum frame rate is estimated at 100 Mega-frames per second (Mfps) by transient simulation study. The sensor has a spatial resolution of 140,800 pixels with 126 linear storage elements installed in each pixel. The very high sensitivity is ensured by application of backside illumination technology and cooling. The ultra-high frame rate is achieved by the in situ storage image sensor (ISIS) structure on the front side. In this paper, we summarize technologies developed to achieve the theoretical maximum frame rate, including: (1) a special p-well design by triple injections to generate a smooth electric field backside towards the collection gate on the front side, resulting in much shorter electron transit time; (2) design technique to reduce RC delay by employing an extra metal layer exclusively to electrodes responsible for ultra-high speed image capturing; (3) a CCD specific complementary on-chip inductance minimization technique with a couple of stacked differential bus lines.

A Backside-Illuminated Image Sensor With 200 000 Pixels Operating at 250 000 Frames per Second

In this paper, a high-speed image sensor with very high sensitivity is developed. The high sensitivity is achieved by introduction of backside illumination and charge-carrier multiplication (CCM). The high frame rate is guaranteed by installing the in situ storage image sensor (ISIS) structure on the front side. A test sensor of the BSI-ISIS has been developed and evaluated. It is shown that an image with a very low signal level embedded under the noise floor is recognizable by activating the CCM.

Pixel parallel localized driver design for a 128 x 256 pixel array 3D 1Gfps image sensor

In this paper, a 3D 1Gfps BSI image sensor is proposed, where 128 × 256 pixels are located in the top-tier chip and a 32 × 32 localized driver array in the bottom-tier chip. Pixels are designed with Multiple Collection Gates (MCG), which collects photons selectively with different collection gates being active at intervals of 1ns to achieve 1Gfps. For the drivers, a global PLL is designed, which consists of a ring oscillator with 6-stage current starved differential inverters, achieving a wide frequency tuning range from 40MHz to 360MHz (20ps rms jitter). The drivers are the replicas of the ring oscillator that operates within a PLL. Together with level shifters and XNOR gates, continuous 3.3V pulses are generated with desired pulse width, which is 1/12 of the PLL clock period. The driver array is activated by a START signal, which propagates through a highly balanced clock tree, to activate all the pixels at the same time with virtually negligible skew.

Ultra-high-speed bionanoscope for cell and microbe imaging

We are developing an ultra-high-sensitivity and ultra-high-speed imaging system for bioscience, mainly for imaging of microbes with visible light and cells with fluorescence emission. Scarcity of photons is the most serious problem in applications of high-speed imaging to the scientific field. To overcome the problem, the system integrates new technologies consisting of (1) an ultra-high-speed video camera with sub-ten-photon sensitivity with the frame rate of more than 1 mega frames per second, (2) a microscope with highly efficient use of light applicable to various unstained and fluorescence cell observations, and (3) very powerful long-pulse-strobe Xenon lights and lasers for microscopes. Various auxiliary technologies to support utilization of the system are also being developed. One example of them is an efficient video trigger system, which detects a weak signal of a sudden change in a frame under ultra-high-speed imaging by canceling high-frequency fluctuation of illumination light. This paper outlines the system with its preliminary evaluation results.

Technologies to develop a video camera with a frame rate higher than 100 Mfps

A feasibility study is presented for an image sensor capable of image capturing at 100 Mega-frames per second (Mfps). The basic structure of the sensor is the backside-illuminated ISIS, the in-situ storage image sensor, with slanted linear CCD memories, which has already achieved 1 Mfps with very high sensitivity. There are many potential technical barriers to further increase the frame rate up to 100 Mfps, such as traveling time of electrons within a pixel, Resistive-Capacitive (RC) delay in driving voltage transfer, heat generation, heavy electro-magnetic noises, etc. For each of the barriers, a countermeasure is newly proposed and the technical and practical possibility is examined mainly by simulations. The new technical proposals include a special wafer with n and p double epitaxial layers with smoothly changing doping profiles, a design method with curves, the thunderbolt bus lines, and digitalnoiseless image capturing by the ISIS with solely sinusoidal driving voltages. It is confirmed that the integration of these technologies is very promising to realize a practical image sensor with the ultra-high frame rate.

Crosstalk in multi-collection-gate image sensors and its improvement

Crosstalk in the backside-illuminated multi-collection-gate (BSI-MCG) image sensor was analyzed by means of Monte Carlo simulation. The BSI-MCG image sensor was proposed to achieve the temporal resolution of 1 ns. In this sensor, signal electrons generated by incident light near the back side travel to the central area of the pixel on the front side. Most of the signal electrons are collected by a collecting gate, to which a higher voltage is applied than that of other collection gates. However, due to spatial and temporal diffusion, some of the signal electrons migrate to other collection gates than the collecting gate, resulting in spatiotemporal crosstalk, i.e., mixture of signal electrons at neighboring collection gates and/or pixels. To reduce the crosstalk, the BSI-MCG structure is modified and the performance is preliminarily evaluated by Monte Carlo simulation. An additional donut-shaped N type implantation at the collection-gate area improves the potential gradient to the collecting gate, which reduces the crosstalk caused by the spatial diffusion. A multi-framing camera based on the BSI-MCG image sensor can be applied to Fluorescence Lifetime Imaging Microscopy (FLIM). In this case, crosstalk reduces accuracy in estimation of the lifetimes of fluorophore samples. The inaccuracy is compensated in a post image processing based on a proposed impulse response method.

An Image Signal Accumulation Multi-Collection-Gate Image Sensor Operating at 25 Mfps with 32 × 32 Pixels and 1220 In-Pixel Frame Memory

The paper presents an ultra-high-speed image sensor for motion pictures of reproducible events emitting very weak light. The sensor is backside-illuminated. Each pixel is equipped with the multiple collection gates (MCG) at the center of the front side. Each collection gate is connected to an in-pixel large memory unit, which can accumulate image signals captured by repetitive imaging. The combination of the backside illumination, image signal accumulation, and slow readout from the in-pixel signal storage after an image capturing operation offers a very high sensitivity. Pipeline signal transfer from the MCG to the in-pixel memory units enables the sensor to achieve a large frame count and a very high frame rate at the same time. A test sensor was fabricated with a pixel count of 32 × 32 pixels. Each pixel is equipped with four collection gates, each connected to a memory unit with 305 elements; thus, with a total frame count of 1220 (305 × 4) frames. The test camera achieved 25 Mfps, while the sensor was designed to operate at 50 Mfps.

Crosstalk analysis of an image sensor operating at 1 Gfps

This paper evaluates temporal resolution of an ultra-high-speed image sensor and analyzes crosstalk between image signals when the sensor operates at 1 Giga frames per second (Gfps). The Backside-Illuminated Multi-Collection-Gate (BSI-MCG) structure of the sensor was proposed to achieve ultra-high speed imaging with very high sensitivity. The temporal resolution of the sensor is limited by an electronic factor - the travel time distribution of photoelectrons from their generated positions to a selective collection gate on the front side. To evaluate the travel time at the nanosecond time scale, random motions of electrons are included by using a Monte Carlo simulator in combination with a device simulator. The results show that less than 1ns temporal resolution is achievable. Due to the effect of random motions, crosstalk occurs between the output signals of the sensor. Different types of crosstalk are classified. To estimate the output image signals including crosstalk from other signals, an impulse response method is proposed.

Fusion: ultra-high-speed and IR image sensors

Most targets of ultra-high-speed video cameras operating at more than 1 Mfps, such as combustion, crack propagation, collision, plasma, spark discharge, an air bag at a car accident and a tire under a sudden brake, generate sudden heat. Researchers in these fields require tools to measure the high-speed motion and heat simultaneously. Ultra-high frame rate imaging is achieved by an in-situ storage image sensor. Each pixel of the sensor is equipped with multiple memory elements to record a series of image signals simultaneously at all pixels. Image signals stored in each pixel are read out after an image capturing operation. In 2002, we developed an in-situ storage image sensor operating at 1 Mfps 1). However, the fill factor of the sensor was only 15% due to a light shield covering the wide in-situ storage area. Therefore, in 2011, we developed a backside illuminated (BSI) in-situ storage image sensor to increase the sensitivity with 100% fill factor and a very high quantum efficiency 2). The sensor also achieved a much higher frame rate,16.7 Mfps, thanks to the wiring on the front side with more freedom 3). The BSI structure has another advantage that it has less difficulties in attaching an additional layer on the backside, such as scintillators. This paper proposes development of an ultra-high-speed IR image sensor in combination of advanced nano-technologies for IR imaging and the in-situ storage technology for ultra-highspeed imaging with discussion on issues in the integration.

Toward 1Gfps: Evolution of ultra-high-speed image sensors -ISIS, BSI, multi-collection gates, and 3D-stacking-

Evolution of ultra-high-speed image sensors is reviewed. Currently, the highest frame rate achieved by a solid-state image sensor is 16.7 Mfps, while the target of this project is 1 Gfps. To achieve this target, we propose an image sensing unit consisting of CCD pixels and a CMOS driver circuit, whereas the pixel has multiple collection gates, and the driver comprises a ring oscillator with XNOR circuits. The sensor and the driver are mounted on different IC chips by 3D stacking. Simulations confirm that the proposed technology achieves the target. In ultra-high-speed imaging, sensitivity is crucial. A technique to achieve very high sensitivity is also proposed.