Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Valencia M. Joyner is active.

Publication


Featured researches published by Valencia M. Joyner.


IEEE Journal of Selected Topics in Quantum Electronics | 2005

Integrated transceivers for optical wireless communications

Dominic C. O'Brien; Grahame Faulkner; Emmanuel B. Zyambo; Kalok Jim; David J. Edwards; Paul N. Stavrinou; Gareth Parry; Jacques Bellon; Martin J.N. Sibley; Vinod A. Lalithambika; Valencia M. Joyner; Rina J. Samsudin; Dm Holburn; Robert J. Mears

Line-of-sight free-space optical links can provide extremely high bandwidth communications, but this usually requires that transmitter and receiver are precisely aligned. In order to allow terminals to be mobile, links must be able to track users within their field of view so that the link is maintained. There are various means to do this, but all require complex subsystems with a number of different optical, optoelectronic, and electrical components. A solid-state tracking architecture is introduced and a seven-channel tracking system demonstration described. The system is designed to operate at 155 Mb/s and is, to the best of our knowledge, the first that uses an integrated approach. Arrays of novel resonant cavity LED (RCLED) emitters that operate at 980 nm are used as sources. These are flip-chip bonded to arrays of CMOS driver circuits and integrated with the necessary transmitter optics. The receiver uses a back-illuminated detector array flip-chip bonded to arrays of custom CMOS receivers. All these components are custom and have performance substantially better than nonoptimized commercially available components. In the paper, the design and fabrication of the optics, optoelectronics, and electronics required for this is described. Successful operation of all the subsystems is detailed, together with results from an initial link demonstration.


IEEE Communications Magazine | 2003

High-speed integrated transceivers for optical wireless

Dominic C. O'Brien; Grahame Faulkner; Kalok Jim; Emmanuel B. Zyambo; David J. Edwards; M Whitehead; Paul N. Stavrinou; Gareth Parry; Jacques Bellon; Martin J.N. Sibley; Vinod A. Lalithambika; Valencia M. Joyner; Rina J. Samsudin; Dm Holburn; Robert J. Mears

Optical wireless LANs have the potential to provide bandwidths far in excess of those available with current or planned RF networks. There are several approaches to implementing optical wireless systems, but these usually involve the integration of optical, optoelectronic, and electrical components in order to create transceivers. Such systems are necessarily complex, and the widespread use of optical wireless is likely to be dependent on the ability to fabricate the required transceiver components at low cost. A number of UK universities are currently involved in a project to demonstrate integrated optical wireless subsystems that can provide line-of-sight in-building communications at 155 Mb/s and above. The system uses two-dimensional arrays of novel microcavity LED emitters and arrays of detectors integrated with custom CMOS integrated circuits to implement tracking transceiver components. In this article we set out the basic approaches that can be used for in-building optical wireless communication and argue the need for an integrated and scalable approach to the fabrication of transceivers. Our work aimed at implementing these components, including experimental results and potential future directions, is then discussed.


electronic imaging | 2008

Two Fibonacci P-code based image scrambling algorithms

Yicong Zhou; Sos S. Agaian; Valencia M. Joyner; Karen Panetta

Image scrambling is used to make images visually unrecognizable such that unauthorized users have difficulty decoding the scrambled image to access the original image. This article presents two new image scrambling algorithms based on Fibonacci p-code, a parametric sequence. The first algorithm works in spatial domain and the second in frequency domain (including JPEG domain). A parameter, p, is used as a security-key and has many possible choices to guarantee the high security of the scrambled images. The presented algorithms can be implemented for encoding/decoding both in full and partial image scrambling, and can be used in real-time applications, such as image data hiding and encryption. Examples of image scrambling are provided. Computer simulations are shown to demonstrate that the presented methods also have good performance in common image attacks such as cutting (data loss), compression and noise. The new scrambling methods can be implemented on grey level images and 3-color components in color images. A new Lucas p-code is also introduced. The scrambling images based on Fibonacci p-code are also compared to the scrambling results of classic Fibonacci number and Lucas p-code. This will demonstrate that the classical Fibonacci number is a special sequence of Fibonacci p-code and show the different scrambling results of Fibonacci p-code and Lucas p-code.


global communications conference | 2010

A digitally-controlled, bi-level CMOS LED driver circuit combining PWM dimming and data transmission for visible light networks

Ali Mirvakili; Valencia M. Joyner

Recent breakthroughs in solid-state lighting technology has opened the door to a myriad of applications using light-emitting diodes for both illumination and optical wireless networking. Low-power CMOS technology enables realization of mixed-mode, system-on-chip driver circuits integrating multiple functions on a single substrate to control LED device performance, luminance, and data modulation for “intelligent” visible light networking. This paper presents a novel LED driver circuit architecture incorporating digitally-controlled analog circuit blocks to deliver concurrent illumination control and serial data transmission. To achieve this goal, a bi-level pulse-width modulation (PWM) driving scheme is applied to enable data transmission during the “OFF” period of the LED drive current. With 3-bit PWM dimming resolution, the driver circuit enables linear luminous intensity control from 5% to 100%. Pseudo-random binary sequences (PRBS) are generated to compare circuit performance for various data modulation formats. The LED driver circuit is simulated in a 0.5µm CMOS process and exhibits a worst-case power consumption of 100mW with 33mA peak PWM current.


IEEE Sensors Journal | 2010

A Monolithically Integrated Phase-Sensitive Optical Sensor for Frequency-Domain NIR Spectroscopy

Ruida Yun; Valencia M. Joyner

This paper presents design and measurement results of a fully integrated optical sensor for phase and amplitude detection of RF modulated optical signals up to 110 MHz in the near-infrared (NIR) region (650-850 nm) for use in frequency-domain spectroscopy instruments. The sensor consists of an NIR-sensitive photodetector monolithically integrated with a front-end analog amplifier and signal processing circuitry for amplitude and phase detection in an unmodified complementary metal oxide semiconductor (CMOS) process. A high-gain, low-noise differential transimpedance amplifier (TIA) is implemented to amplify the photocurrent signal. Amplitude and phase resolution are evaluated with a 690 nm laser diode modulated at 100 MHz. The amplitude response exhibits 2.2 mV/μW resolution with 0.4% linearity. The measured amplitude output noise is 72 μ~V. The proposed phase detector detects 0°-360° phase difference with a measured average phase resolution of 4.8 mV/degree and 255 μV output noise. The sensor is implemented in a 180 nm CMOS technology and consumes 23.4 mW from a 1.8 V supply voltage.


IEEE Transactions on Advanced Packaging | 2010

Packaging of Dual-Mode Wireless Communication Module Using RF/Optoelectronic Devices With Shared Functional Components

Jun Liao; J. Zeng; Shengling Deng; Anatoliy O. Boryssenko; Valencia M. Joyner; Zhaoran Rena Huang

This paper reports the design, fabrication, and testing of a compact radio-frequency (RF)/ free space optical (FSO) dual mode wireless communication system. A modified split dual-director quasi-Yagi antenna is integrated with optical transmitter and receiver by sharing layout structural components. Bare die vertical-cavity surface-emitting laser (VCSEL) and P-i-N photodiode (PIN) are placed on antenna director pads and wire bonded to printed circuit board (PCB)-mounted laser driver and transimpedance amplifier (TIA) circuits. Detailed analysis of coupling between RF channel and associated electrical connections for the FSO channel is presented using commercial simulation tools to predict its impact on link degradation. Although crosstalk appears between RF and optical channels, the prototyped system demonstrated dual-mode high-rate communication capability with measured 2.5 Gb/s data rate in FSO link. Variations in RF subsystem features due to coupling from the FSO subsystem is estimated through radiation pattern measurement using near-field scanner.


international midwest symposium on circuits and systems | 2009

A 5Gb/s 7-channel current-mode imaging receiver front-end for free-space optical MIMO

J. Zeng; Valencia M. Joyner; Jun Liao; Shengling Deng; Zhaoran Huang

A 7-channel diversity receiver front-end based on current-summing for broadband free-space optical (FSO) MIMO communication is presented in this paper. This diversity receiver is designed for flip-chip bonding to a custom InGaAs metal-semiconductor-metal (MSM) photodetector array. Each channel employs a low input-impedance current mirror (CM) as the input stage, which allows the implementation of direct current-summing for equal-gain combining (EGC). The summed-up current signal drives a second stage transimpedance amplifier (TIA) to generate the output voltage. Implemented in an 180 nm CMOS technology, a total gain of 58.5 dBΩ, and −3dB bandwidth of 3.7 GHz for 0.25 pF photodiode capacitance is achieved. The power consumption for a single front-end amplifier circuit is 4.2 mW, and for the second stage TIA is 10.3mW with a single 1.8V supply.


Optical wireless communications. Conference | 2001

High speed integrated optical wireless transceivers for in-building optical LANs

Dominic C. O'Brien; Grahame Faulkner; Kalok Jim; Emmanuel B. Zyambo; David J. Edwards; M Whitehead; Paul N. Stavrinou; Gareth Parry; Jacques Bellon; Martin J.N. Sibley; Vinod A. Lalithambika; Valencia M. Joyner; Rina J. Samsudin; Richard M. Atkinson; Dm Holburn; Robert J. Mears

12 Maintaining high bandwidth indoor optical wireless channels under a wide range of operating conditions usually requires relatively complex transceiver components. Integrating optical, optoelectronic and optical components using techniques that are suitable for mass manufacture is an important step in the development of these systems. This paper describes work to develop low cost integrated tracking transmitter and receiver components for use in a cellular indoor optical wireless network. A seven channel demonstrator operating at 155 Mb/s is under construction, using arrays of Resonant Cavity LEDs, PIN detectors, Silicon CMOS driver circuits and associated optics. Development of components, design methodology and initial results are detailed.


lasers and electro-optics society meeting | 2006

A CMOS Imaging Diversity Receiver Chip with a Flip-Chip Integrated Detector Array for Optical Wireless Links

Valencia M. Joyner; Dm Holburn; Dominic C. O'Brien; Grahame Faulkner

An optical receiver circuit incorporating a novel current-mode, channel selection and combination circuit architecture is presented. Optical measurements at 310 Mb/s are demonstrated on the CMOS receiver chip flip-chip bonded to a custom detector array


Optical wireless communications. Conference | 2001

Development of a CMOS 310-Mb/s receiver for free-space optical wireless links

Vinod A. Lalithambika; Valencia M. Joyner; Dm Holburn; Robert J. Mears

12 This paper presents the design and implementation of a CMOS 310 Mb/s receiver for use in a multi-channel 155 Mb/s Manchester-coded optical wireless link. The receiver consists of a pre-amplifier followed by a post amplifier circuit. The pre-amplifier is a three stage transimpedance amplifier with an NMOS load at the output of each stage to control gain and stability. To allow the sensitivity of the performance to key parameters to be visualized a nomograph technique was developed. The contours of the nomograph show how DC bias, dominant pole frequency and the gain of each stage vary with transistor dimensions. This allows the designer to select transistor sizes for a given bit rate and for stable operation. The design has been optimized to achieve -30 dBm sensitivity at a BER of 10-9.

Collaboration


Dive into the Valencia M. Joyner's collaboration.

Top Co-Authors

Avatar

Dm Holburn

University of Cambridge

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Jun Liao

Rensselaer Polytechnic Institute

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Jacques Bellon

University of Huddersfield

View shared research outputs
Top Co-Authors

Avatar
Top Co-Authors

Avatar

Gareth Parry

Imperial College London

View shared research outputs
Researchain Logo
Decentralizing Knowledge