Victor Lomné

Evaluation on FPGA of triple rail logic robustness against DPA and DEMA

Side channel attacks are known to be efficient techniques to retrieve secret data. In this context, this paper concerns the evaluation of the robustness of triple rail logic against power and electromagnetic analyses on FPGA devices. More precisely, it aims at demonstrating that the basic concepts behind triple rail logic are valid and may provide interesting design guidelines to get DPA resistant circuits which are also more robust against DEMA.

Evaluating the robustness of secure triple track logic through prototyping

Side channel attacks are known to be efficient techniques to retrieve secret data. Within this context, this paper proposes to prototype a logic called Secure Triple Track Logic (STTL) on FPGA and evaluate its robustness against power analyses. More precisely, the paper aims at demonstrating that the basic concepts on which this logic leans are valid and may provide interesting design guidelines to obtain secure circuits.

Enhancing electromagnetic attacks using spectral coherence based cartography

Electro-Magnetic Analysis has been recently identified as an efficient technique to retrieve the secret key of cryptographic algorithms. Although similar from a mathematical point of view, Power or Electro-Magnetic Analyses have different advantages in practice. Among the advantages of EM analysis, the feasibility of attacking limited and bounded area of integrated systems is the key one. However, efficient techniques are required to localize hot spots, characterized by partially data-dependent electromagnetic emissions, at which a Differential Electro-Magnetic Analysis (DEMA) may be applied with success to retrieve the secret key. This paper aims at introducing a pragmatic technique to localize quickly and efficiently these points of interest.

Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence

This paper demonstrates that magnitude squared incoherence (MSI) analysis is efficient to localize hot spots, i.e., points at which focused electromagnetic (EM) analyses can be applied with success. It is also demonstrated that MSI may be applied to enhance differential EM analyses (DEMA) based on difference of means (DoM).

Differential power analysis enhancement with statistical preprocessing

Differential Power Analysis (DPA) is a powerful Side-Channel Attack (SCA) targeting as well symmetric as asymmetric ciphers. Its principle is based on a statistical treatment of power consumption measurements monitored on an Integrated Circuit (IC) computing cryptographic operations. A lot of works have proposed improvements of the attack, but no one focuses on ordering measurements. Our proposal consists in a statistical preprocessing which ranks measurements in a statistically optimized order to accelerate DPA and reduce the number of required measurements to disclose the key.

A GALS pipeline DES architecture to increase robustness against DPA and DEMA attacks

Side channels attacks (SCA) are very effective and low cost methods to extract secret information from supposedly secure cryptosystems. Differential Power Analysis (DPA) and Differential Electromagnetic Analysis (DEMA) are among the most cited attack types. The traditional synchronous design flow used to create such systems favors the leakage of information that enables attackers to draw correlations between data processes and circuit power consumption or electromagnetic radiations. By using well known analysis techniques these correlations may allow that an attacker retrieve secret cryptographic keys. In recent years, several countermeasures against SCA have been proposed. Globally Asynchronous Locally Synchronous (GALS) and fully asynchronous design methods appear as alternatives to design tamper resistant cryptosystems. However, according to previous works they use to achieve this with significant area, throughput, latency and power penalties. This paper proposes a new GALS pipeline architecture for the Data Encryption Standard (DES) that explores the trade-off between circuit area and robustness. Robustness is enhanced by replicating the DES hardware structure in asynchronously communicating module instances, coupled with self-varying operating frequencies. Designs prototyped on FPGAs using the proposed technique and submitted to DEMA attacks presented promising robustness against attacks and throughput superior to previously reported results.

Modeling time domain magnetic emissions of ICs

ElectroMagnetic (EM) radiations of Integrated Circuits (IC) is for many years a main problem from an ElectroMagnetic Compatibility (EMC) point-of-view. But with the increasing use of secure embedded systems, and the apparition of new attacks based on the exploitation of physical leakages of such secure ICs, it is now also a critical problem for secure IC designers. Indeed, EM radiations of an IC, and more precisely the magnetic component, can be exploited to retrieve sensible data such as, the secret key of cryptographic algorithms. Within this context, this paper aims at introducing a magnetic field simulation flow allowing predicting, with high spatial and time resolutions, the magnetic radiations of IC cores. Such a flow being mandatory to predict the robustness of secure ICs before fabrication against EM attacks.

Cost-Effective Design Strategies for Securing Embedded Processors

Side-channel attacks (SCAs), such as differential power analysis or differential electromagnetic analysis, pose a serious threat to the security of embedded systems. In the literature, few articles address the problem of securing general purpose processors (GPPs) with resourceful countermeasures. However, in many low-cost applications, where security is not critical, cryptographic algorithms are typically implemented in software. Since it has been proved that GPPs are vulnerable to SCAs, it is desirable to develop efficient mechanisms to ensure a certain level of security. In this paper, we extend side-channel countermeasures to the register transfer level description. The challenge is to create a new class of processor that executes embedded software applications, which are intrinsically protected against SCAs. For that purpose, we first investigate how to integrate into the datapath two countermeasures based on masking and hiding approaches. Through an FPGA-based processor, we then evaluate the overhead and the effectiveness of the proposed solutions against time-domain first-order attacks. We finally show that a suitable combination of countermeasures significantly increases the side-channel resistance in a cost-effective way.

Triple Rail Logic Robustness against DPA

Side channel attacks are known to be efficient techniques to retrieve secret data. Within this context, the scope of this paper is to evaluate, on and for FPGA, the robustness of triple rail logic against power analyses. More precisely, this paper aims at demonstrating that the basic concepts on which leans this logic are valid and may provide interesting design guidelines to obtain DPA (differential power analysis) resistant circuits.

Incoherence analysis and its application to time domain EM analysis of secure circuits

Since several years, Electromagnetic (EM) radiations of ICs are considered as source of noise and interferences from an EM Compatibility (EMC) point-of-view. Electromagnetic interferences (EMI) are unwanted disturbances that affect digital circuits due to electromagnetic conduction or electromagnetic radiation emitted from an internal or external source. Today electromagnetic radiations of ICs also represent vulnerabilities for hardware security modules like smartcards. Recently, from a hardware security point of view, researchers, industrials and governmental agencies are focusing with strong interest on these radiations. This paper aims at introducing a pragmatic technique WGMSI (Weighted Global Magnitude Squared Incoherence) allowing localizing hardware security modules within the whole EM noise generated by the environment or other modules of the circuits.