Vijay Pochampalli Kumar

Beyond best effort: router architectures for the differentiated services of tomorrow's Internet

With the transformation of the Internet into a commercial infrastructure, the ability to provide differentiated services to users with widely varying requirements is rapidly becoming as important as meeting the massive increases in bandwidth demand. Hence, while deploying routers, switches, and transmission systems of ever increasing capacity, Internet service providers would also like to provide customer-specific differentiated services using the same shared network infrastructure. We describe router architectures that can support the two trends of rising bandwidth demand and rising demand for differentiated services. We focus on router mechanisms that can support differentiated services at a level not contemplated in proposals currently under consideration due to concern regarding their implementability at high speeds. We consider the types of differentiated services that service providers may want to offer and then discuss the mechanisms needed in routers to support them. We describe plausible implementations of these mechanisms (the scalability and performance of which have been demonstrated by implementation in a prototype system) and argue that it is technologically possible to considerably raise the level of differentiated services which service providers can offer their customers, and that it is not necessary to restrict differentiated services to rudimentary offerings even in very-high-speed networks.

High Speed Pattern Matching for Network IDS/IPS

The phenomenal growth of the Internet in the last decade and societys increasing dependence on it has brought along, a flood of security attacks on the networking and computing infrastructure. Intrusion detection/prevention systems provide defenses against these attacks by monitoring headers and payload of packets flowing through the network. Multiple string matching that can compare hundreds of string patterns simultaneously is a critical component of these systems, and is a well-studied problem. Most of the string matching solutions today are based on the classic Aho-Corasick algorithm, which has an inherent limitation; they can process only one input character in one cycle. As memory speed is not growing at the same pace as network speed, this limitation has become a bottleneck in the current network, having speeds of tens of gigabits per second. In this paper, we propose a novel multiple string matching algorithm that can process multiple characters at a time thus achieving multi-gigabit rate search speeds. We also propose an architecture for an efficient implementation on TCAM-based hardware. We additionally propose novel optimizations by making use of the properties of TCAMs to significantly reduce the memory requirements of the proposed algorithm. We finally present extensive simulation results of network-based virus/worm detection using real signature databases to illustrate the effectiveness of the proposed scheme.

Switched optical backbone for cost-effective scalable core IP networks

With the advent of WDM technology, IP backbone carriers are now connecting core routers directly over point-to-point WDM links (IP over WDM). The advances and standardization in optical control plane technologies like GMPLS have substantially increased the intelligence of the optical layer and shown promise toward making dynamic provisioning and restoration of optical layer circuits a basic capability to be leveraged by upper network layers. In light of this, an architecture where a reconfigurable optical backbone (IP over OTN) consisting of SONET/SDH crossconnects/switches interconnected via DWDM links provides connectivity among IP routers is an emerging alternative. As carriers evolve their networks to meet the continued growth of data traffic in the Internet, they have to make a fundamental choice between the above architectural alternatives. In the current business environment, this decision is likely to be guided by network cost and scalability concerns. A reconfigurable optical backbone provides a flexible transport infrastructure that eases many operational hurdles, such as fast provisioning, robust restoration, and disaster recovery. It can also be shared with other service networks such as ATM, frame relay, and SONET/SDH. From that perspective, an agile transport infrastructure is definitely the architecture of choice. The IP-over-OTN solution is also more scalable since the core of the network in this architecture is based on more scalable optical switches rather than IP routers. But what about cost? Since the IP-over-OTN solution introduces a new network element, the optical switch, is it more expensive? We address that question by comparing IP-over-WDM and IP-over-OTN architectures from an economic standpoint using real-life network data. We show that contrary to common wisdom, IP over OTN can lead to substantial reduction in capital expenditure through reduction of expensive transit IP router ports. The savings increases rapidly with the number of nodes in the network and traffic demand between nodes. The economies of scale for the IP-over-OTN backbone increase substantially when we move traffic restoration from the IP layer to the optical layer. We also compare the two architectures from the perspective of scalability, flexibility, and robustness. Our observations make a strong case in favor of a switched optical backbone for building scalable IP networks.

Multicast routing in self-routing multistage networks

The authors present a study on multicast routing algorithms for the self-routing multistage networks. This work is based on the use of the cube concept which consists of a group of outlets reachable in one pass through the network. A multicast connection is decomposed into associated cubes such that each cube can be self-routed through the network. The context of this work is a recursive scheme for multistage network where the outlets are fed back to the inlets through external links. Three routing algorithms are proposed. The emphasis is on evaluating the performance of those algorithms in terms of two metrics. Extensive results from analysis and simulations are given to derive insights into the performance of the proposed routing algorithms.<<ETX>>

Max-min rate control algorithm for available bit rate service in ATM networks

The definition of available bit rate (ABR) service has been a focus of activities of the ATM Forum. The Forum has adopted rate-based schemes as the standard for congestion control of ABR services. The enhanced proportional rate control algorithm (EPRCA) has been suggested as a possible algorithm for the switch behavior. In this paper, we propose a new family of algorithms for the switch behavior, called max-min rate control algorithms (MMRCA). The basic MMRCA scheme uses minimum and maximum rate of all active connections to select which connections should be forced to decrease their rate during congestion; the enhancements of the basic scheme use additional congestion detection mechanisms to prevent potential congestion by intelligently regulating selected connections. The new schemes are fully compatible with the existing ATM standard, and have low hardware complexity. All MMRCA schemes converge to the same fair share for all connections as EPRCA, but achieve faster convergence time; the enhanced MMRCA schemes also require smaller buffer sizes at the switches, and achieve higher link utilization than EPRCA. LANs and WANs are discussed.

Failure dependent performance analysis of a fault-tolerant multistage interconnection network

To provide fault tolerance and improve system reliability and performance, a class of fault-tolerant multistage interconnection networks, called augmented shuffle-exchange networks (ASENs) has been proposed. ASENs are gracefully degradable; although an individual component failure reduces ASEN performance, it does not cause a total network failure. The purpose of this work is to analyze how these component failures affect ASEN performance. A key step in performance and reliability modeling is the choice of an appropriate metric for analysis. Because network bandwidth can be an inadequate performance measure when fault are present. The authors consider other network performance measures, including the interreference time distribution for individual outputs (memories). >

Dynamic max rate control algorithm for available bit rate service in ATM networks

The ATM Forum has adopted rate-based congestion control as the standard for available bit rate (ABR) services. In order to achieve fairness, it is necessary that the rate-based control schemes use intelligent marking, i.e., notify congestion only to selected connections. For these schemes to perform well, the central issue is to guarantee that the marking threshold is a good estimate of the fair share of the available bandwidth to which each connection is supposed to converge. In the existing schemes, such as the enhanced proportional rate control algorithm (EPRCA), this approximation does not always hold, for example due to bottlenecked connections, transient behaviors, safety parameters in the algorithms, or incorrect rate information from the sources. In this paper, we propose a new algorithm for the switch behavior, called the dynamic max rate control algorithm (DMRCA), which distinguishes itself from the existing schemes in that it uses a marking threshold which is a function of the degree of congestion at the switch and the maximum rate of all active connections. We show that this threshold is always an accurate estimate of the fair share, and thus the new algorithm outperforms the existing schemes, achieving fairness in all situations. The new scheme can be implemented with low complexity, and is fully compatible with the existing ATM standard.

Virtual queueing techniques for ABR service: improving ABR/VBR interaction

Several algorithms have been proposed for the switch behavior for congestion control of available bit rate (ABR) services. Schemes such as the enhanced proportional rate control algorithm (EPRCA) and the dynamic max rate control algorithm (DMRCA), which use the queue length as the congestion indicator to make a simple approximation of the fair share converge to the actual fair share, have become popular, because they offer a good performance and are simple to implement. In particular, with no VBR traffic in the network, DMRCA has been shown to achieve fairness in all situations, good buffer control, and robust performance. First we show that the performance of these schemes may degrade when ABR traffic interacts with highly-bursty VBR traffic. If VBR traffic induces congestion in the network, the length of the ABR queue cannot serve as a reliable indicator of congestion caused by ABR traffic, and the schemes perform poorly, introducing considerable unfairness. Then, we propose a simple technique to solve these problems. The switch constructs the length of a virtual queue which is not affected by the instantaneous behavior of VBR traffic, and does not depend on how the two types of traffic are served in order to share the common link capacity; thus, it can serve as a reliable indicator of congestion. We use this technique in DMRCA with virtual queueing (DMRCA-VQ), and show that the new scheme achieves fair rate allocation to the ABR connections also in the presence of highly-bursty VBR traffic. The DMRCA-VQ maintains the low hardware complexity of DMRCA. The virtual queueing technique is a solution for the more general problem of separating rate allocation based on the queue length from scheduling of multiple queues for sharing a common resource.

Backpressure in shared-memory-based ATM switches under multiplexed bursty sources

We study a shared-memory center-stage switch with input multiplexers and output demultiplexers, where backpressure is applied from the demultiplexers to the center stage, and from the center stage to the multiplexers. We consider three backpressure schemes: (i) non-selective backpressure (NSB), where a congested center stage or a congested demultiplexer applies backpressure indiscriminately to all the traffic destined to it, regardless of the destination; (ii) per-port selective backpressure (PPSB), where the center stage applies backpressure selectively only to the traffic destined to the center-stage port(s) experiencing congestion, but a demultiplexer applies backpressure indiscriminately to all the traffic destined to it; and (iii) per-subport selective backpressure (PSSB), where both center-stage switch and demultiplexers apply backpressure selectively only to the traffic destined to the output link(s) experiencing congestion. We show that NSB introduces heavy HOL blocking which limits the throughput of the system and causes heavy losses. On the contrary, PPSB and PSSB achieve high throughputs, and allow one to increase buffer utilization in the system while keeping the majority of the buffers physically separate in the input multiplexers. Both these schemes perform very well in the case where only limited sharing of the buffers in the center stage is allowed, as required to guarantee fairness in the switch. With PSSB, small buffer sizes in the demultiplexers can be used. If the buffers in the demultiplexers are large, PPSB and PSSB offer comparable performance.

Performance of a crosspoint buffered ATM switch fabric

The authors present a queuing analysis and a simulation study of banyan switch fabrics based on 2*2 switching elements with crosspoint buffering. In particular, the results apply to the PHOENIX switching element based banyan fabrics. The results indicate that crosspoint buffering provides throughput approaching the offered load under uniform traffic conditions. The effect of bursty traffic on the performance of the switch is studied. It is shown that a speedup factor of three or more is required to achieve acceptable delay and packet loss probability. It is also shown that the amount of buffer space required per port increases linearly with the burst size for a desired packet loss performance. For a given burst size the packet loss rate decreases exponentially as the buffer size is increased. The impact of crosspoint buffering and shared buffering in the switching elements on the performance of the banyan fabric is analyzed.<<ETX>>