Vijay Sivasankaran

REUSING PARTIAL BAD BLOCKS IN NAND MEMORY

DYNAMIC LOGICAL GROUPS FOR MAPPING FLASH MEMORY

SYSTEM AND METHOD FOR FOLDING PARTIAL BLOCKS INTO MULTI-LEVEL CELL MEMORY BLOCKS

ADDRESSING, INTERLEAVE, WEAR LEVELING, AND INITIALIZATION SCHEMES FOR DIFFERENT CHIP ENABLES AND MEMORY ARRAYS OF DIFFERENT TYPES

METHOD AND APPARATUS FOR WEAR-LEVELLING NON-VOLATILE MEMORY

Initialization scheme during dual programming of a memory system

Block Management Scheme to Handle Cluster Failures in Non-Volatile Memory

Moving and committing valid data on a set-by-set basis

SCRAMBLING SCHEMES FOR SCRAMBLING AND DESCRAMBLING DATA

Protection scheme with dual programming of a memory system