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Publication
Featured researches published by Vijayeshwar D. Khanna.
IEEE Transactions on Magnetics | 1994
Suresh Kumar; Vijayeshwar D. Khanna; Muthuthamby Sri-Jayantha
A study of the mechanics at the Head Disk Interface caused by an input shock is presented. Experimental results and a dynamic impact model are used to analyze the problem. The study reveals the complex nature of the failure and shows the importance of internal resonance and disk dynamics. Damage on both sides of the disk (due to a unidirectional shock) is explained. >
Microelectronics Reliability | 2008
Lorenzo Valdevit; Vijayeshwar D. Khanna; Arun Sharma; Sri M. Sri-Jayantha; David L. Questad; Kamal K. Sikka
Abstract We present a thermo-mechanical characterization of organic substrates that accounts for heterogeneity both in the in-plane and out-of-plane directions. Systematic observation of the board files of a number of substrates of commercial interest reveals primarily three recurrent topological arrangements of copper and polymer; for each arrangement, the in-plane effective thermo-elastic properties are calculated via appropriate composite materials models. The averaging process in the out-of-plane direction (i.e. the stacking effect) is performed using standard laminated plate theory. The model is successfully applied to various regions of three organic substrates of interest (mainly differing in core thickness): the analytically calculated effective Young’s moduli ( E ) and coefficients of thermal expansion (CTE) are shown to be typically within 10% of the experimental measurements. An important attribute of this model is its ability to provide substrate description at various levels of complexity: a few effective properties are outputted that can be useful for further purely analytical investigations; at the same time, the model provides the full stiffness matrix for each region of the substrate, to be used for more detailed finite elements simulations of higher-level structures (e.g. silicon die/underfill/substrate/cooling solution assemblies). Preliminary application of this model to the warp analysis of a flip-chip is presented in the end.
Journal of Electronic Packaging | 2016
Gerd Schlottig; Marco De Fazio; Werner Escher; Paola Granatieri; Vijayeshwar D. Khanna; Thomas Brunschwiler
We demonstrate the lid-integral silicon cold-plate topology as a way to bring liquid cooling closer to the heat source integrated circuit (IC). It allows us to eliminate one thermal interface material (TIM2), to establish and improve TIM1 during packaging, to use wafer-level processes, and to ease integration in first-level packaging. We describe the integration and analyze the reliability aspects of this package using modeling and test vehicles. To compare the impact of geometry, materials, and mechanical coupling on warpage, strains, and stresses, we simulate finite element models of five different topologies on an organic land-grid array (LGA) carrier. We measure the thermal performance in terms of thermal resistance from cold-plate base to inlet liquid and obtain 15 mm2 K/W at 30 kPa pressure drop across the package. We build two different topologies using silicon cold-plates and injection-molded lids. Gasket-attached cold-plates pass an 800 kPa pressure test, and direct-attached cold-plates fracture in the cold-plate. The results advise to use a compliant layer between cold-plate and manifold lid and promise a uniformly thick TIM1 layer in the Si–Si matched topology. The work shows the feasibility of composite lids with integrated silicon cold-plates in high heat flux applications.
Volume 3: Advanced Fabrication and Manufacturing; Emerging Technology Frontiers; Energy, Health and Water- Applications of Nano-, Micro- and Mini-Scale Devices; MEMS and NEMS; Technology Update Talks; Thermal Management Using Micro Channels, Jets, Sprays | 2015
Gerd Schlottig; Marco De Fazio; Werner Escher; Paola Granatieri; Vijayeshwar D. Khanna; Thomas Brunschwiler
We demonstrate the Lid-Integral Silicon Coldplate topology as a way to bring liquid cooling closer to the heat source IC. It allows to eliminate one thermal interface material (TIM2), to establish and improve TIM1 during packaging, to use wafer-level processes, and to ease integration in 1st level packaging. We describe the integration, and analyze reliability aspects of this package using modeling and test vehicle builts. To compare the impact of geometry, materials and mechanical coupling on warpage, strains and stresses, we simulate finite element models of five different topologies on an organic LGA carrier. We measure the thermal performance in terms of thermal resistance from coldplate base to inlet liquid and obtain 15mm2K/W at 30 kPa pressure drop across the package. We build two different topologies using silicon coldplates and injection molded lids. Gasket-attached coldplates pass an 800 kPa pressure test, direct-attached coldplates fracture in the coldplate. The results advise to use a compliant layer between coldplate and the manifold lid and promise a uniformly thick TIM1 layer in the Si-Si matched topology. The work shows the feasibility of composite lids with integrated silicon coldplates in high heat flux applications.Copyright
Archive | 1989
Shuo Hung Chang; Ferdinand Hendriks; Vijayeshwar D. Khanna; Eric Gung-Hwa Lean
Archive | 1998
Thomas Robert Albrecht; Vijayeshwar D. Khanna; Suresh Kumar; Sri M. Sri-Jayantha
Archive | 1987
John Cocke; Vijayeshwar D. Khanna; Celia Elizabeth Yeack-Scranton
Archive | 1993
Ferdinand Hendriks; Vijayeshwar D. Khanna; Robert M. Crone
Archive | 1998
Kohji Takahashi; Keishi Takahashi; Vijayeshwar D. Khanna; Thomas Robert Albrecht; Suresh Kumar; Muthuthamby Sri-Jayantha
Archive | 1995
Vijayeshwar D. Khanna; Ichiroh Koyanagi; Suresh Kumar; Hiroshi Matsuda; Muthuthamby Sri-Jayantha