Vincent Lapointe

FPGA-Based Real-Time Simulation of Finite-Element Analysis Permanent Magnet Synchronous Machine Drives

This paper presents a real-time simulator of a permanent magnet synchronous motor (PMSM) drive based on a finite-element analysis (FEA) method and implemented on an FPGA card for HIL testing of motor drive controllers. The proposed PMSM model is a phase domain model with inductances and flux profiles computed from the JMAG-RT finite element analysis software. A 3-phase IGBT inverter drives the PMSM machine. Both models are implemented on an FPGA chip, with no VHDL coding, using the RT-LAB real-time simulation platform from Opal-RT and a Simulink blockset called xilinx system generator (XSG). The PMSM drive, along with an open-loop test source for the pulse width modulation, is coded for an FPGA card. The PMSM drive is completed with various encoder models (quadrature, Hall effects and resolver). The overall model compilation and simulation is entirely automated by RT-LAB. The drive is designed to run in a closed loop with a HIL-interfaced controller connected to the I/O of the real-time simulator. The PMSM drive model runs with an equivalent 10 nanosecond time step (100 MHz FPGA card) and has a latency of 300 ns (PMSM machine and inverter) with the exception of the FEA-computed inductance matrix routines which are updated in parallel on a CPU of the real-time simulator at a 40 us rate. The motor drive is directly connected to digital inputs and analog outputs with 1 microsecond settling time on the FPGA card and has a resulting total hardware-in-the-loop latency of 1.3 microseconds.

Hardware-in-the-loop closed-loop experiments with an FPGA-based permanent magnet synchronous motor drive system and a rapidly prototyped controller

Presented in this paper are the results of closed-loop control experiments using a virtual permanent magnet synchronous motor (PMSM) drive implemented on a field- programmable gate array (FPGA) card connected to an external controller. The FPGA-based PMSM motor drive is implemented on an eDRIVEsim simulator, based on the RT-LAB platform. The eDRIVEsim simulator implements 2 types of motor drive models, Park (d-q) and Finite Element Analysis (FEA), on an FPGA card of the simulator. The FPGA-based motor model is designed with Xilinx System Generator (XSG) blockset with no HDL hand coding. Both motor models compute motor currents using a phase-domain algorithm solver that can take into account the instantaneous variation of inductance and non-sinusoidal induced voltage. The FEA-type model uses inductance and Back-EMF profiles computed with JMAG-RT. The d-q model uses sinusoidal induced Back-EMF voltage and phase inductance values computed from Ld and Lq using the well-known Park transformation. A 3-phase IGBT inverter implemented in the FPGA chip drives the PMSM machine. The PWM controller is designed using Rapid Control Prototyping (RCP) methodology based on Simulink. It is implemented on an separate RT-LAB system using standard Opal-RT FPGA-based I/O cards for Analog Input capture and PWM generation. The paper presents results from the closed-loop control of the PMSM drive in both current control and speed control modes and discusses the advantages of using such a virtual test bench for motor drives.

Real-Time and Off-Line Simulation of a Detailed Wind Farm Model Connected to a Multi-Bus Network

This paper describes the detailed modeling and simulation of a wind farm composed of eight doubly-fed induction generators (DFIG) connected to a 24-bus electrical network. Once built, the model was brought to real-time using the eMEGAsim, a Simulink-based, distributed real-time simulator of electrical power systems. Then, analysis of the steady-state and transient response of the system is made. Finally, the paper concludes with a discussion on the off-line performance and the real-time performance on the eMEGAsim simulator.

Real-time simulation on FPGA of a permanent magnet synchronous machine drive using a finite-element based model

This paper presents the development of high fidelity real-time model of a permanent magnet synchronous motor (PMSM) drive, to be used in hardware-in-the-loop (HIL) application. The PMSM model is based on a finite-element analysis (FEA) method and implemented on an FPGA chip. The motor inductances and flux maps are computed from the JMAG-RT finite element analysis software. A 3-phase IGBT inverter drives the PMSM machine. Both models are designed in Simulink using the Xilinx Blockset and then automatically compiled and loaded on the FPGA using the RT-LAB real-time simulation platform. The complete PMSM drive model runs with an equivalent 10 nanosecond time step and has a latency of 300 ns (PMSM machine and inverter), with a total HIL delay from external PWM inputs to analog outputs with 1 microsecond settling time on the FPGA of just 1.3 microseconds.

A real-time dynamic simulation tool for transmission and distribution power systems

ePHASORsim tool offers real-time dynamic simulations for transmission and distribution power systems. Applications such as contingency studies, testing control devices, operator training, and SCADA system tests are examples for employing this tool. This paper describes the hardware and software architecture of the ePHASORsim and its development. The accuracy of the tool has been evaluated in comparison to other commercial, but non-real-time, simulation packages for both transmission and distribution systems. Its real-time performance has been tested with a time-step of 10ms on a real-time simulator for large-scale power systems in the order of 20000 buses, 5000 generators, and over 9000 control devices.

A real-time transient stability simulation tool for large-scale power systems

Development of the Phasor tool for real-time transient stability simulation in large-scale power systems is presented in this paper. This tool can be used for performing contingency studies, testing control devices, as well as training purposes in academia and industry. The Phasor tool includes a model library that is extensible based on the user requirements. The accuracy of the tool has been evaluated in comparison to other commercial but non-real-time transient stability simulation packages, and its real-time performance has been tested on an eMEGAsim real-time simulator for large-scale power systems in the order of 10000 buses, 2500 generators, and over 4500 control devices.

InfiniBand-Based Real-Time Simulation of HVDC, STATCOM, and SVC Devices with Commercial-Off-The-Shelf PCs and FPGAs

This paper presents a real-time simulator for large power networks based on commercial-off-the-shelf products and the RT-LAB platform developed by Opal-RT Technologies Inc. This platform uses Pentium-, Xeon-, or Opteron-based PCs (multi-CPUs and/or dual-core configurations) or even Xilinx FPGA cards for computational engines, and infiniband communication fabric for fast inter-PC communication. The real-time PCs run under well-known operating systems QNX or RedHawk Linux, while the main control interface is either Simulink software from MathWorks or Lab VIEW software from National Instruments. The paper demonstrates the real-time simulation of a complete, single-pole, 12-pulse, HVDC system on a 2.2 GHz, dual-CPU, dual-core, Opteron PC with an under 15-microsecond time step. Also demonstrated are real-time simulations of complex power system devices like SVCs, STATCOMs, and more general power systems like the Kundur network. The paper also discusses the latest advances in hardware-in-the-loop simulation, including directly programming devices like a PMSM drive in an FPGA card. This feature is enabled in RT-LAB with the Xilinx System Generator, a Simulink blockset. Such FPGA targeting diminishes further the leap between prototype and production-type controller systems because an FPGA card can implement rapid control functions along with fast protection systems, like IGBT-current protection, of a real controller

FPGA-based Ultra-Low Latency HIL Fault Testing of a Permanent Magnet Motor Drive using RT-LAB-XSG

Real-time simulation of PMSM drives enables thorough testing of control strategies & software protection routines and therefore allows rapid deployment of vehicular or industrial applications. The proposed PMSM model is a phase domain model with sinusoidal flux induction. A 3-phase IGBT inverter drives the PMSM machine. Both models are implemented on an FPGA chip, without any VHDL coding, with the RT-LAB real-time simulation platform of Opal-RT Technologies using a Simulink blockset called Xilinx System Generator (XSG). The paper explains various aspects of the design of the motor drive models in fixed-point representation in XSG, as well as simulation validation against a standard PMSM drive model built in Simulink. The phase-domain PMSM drive model runs with an equivalent 10 nanosecond time step (100 MHz FPGA card) and has a latency of 300 nanoseconds (PMSM machine and inverter). The motor drive has a resulting total hardware-in-the-loop latency of 1.3 microseconds.

Real-time simulation of finite-element analysis permanent magnet synchronous machine drives on a FPGA card

This paper presents a real-time simulator of a permanent magnet synchronous motor (PMSM) drive based on a finite- element analysis (FEA) method and implemented on an FPGA card for HIL testing of motor drive controllers. The proposed PMSM model is a phase domain model with inductances and flux profiles computed from the JMAG-RT finite element analysis software. A 3-phase IGBT inverter drives the PMSM machine. Both models are implemented on an FPGA chip, with no VHDL coding, using the RT-LAB real-time simulation platform from Opal-RT and a Simulink blockset called Xilinx System Generator (XSG). The PMSM drive, along with an open-loop test source for the pulse width modulation, is coded for an FPGA card. The PMSM drive is completed with various encoder models (quadrature, Hall effects and resolver). The overall model compilation and simulation is entirely automated by RT-LAB. The drive is designed to run in a closed loop with a HIL-interfaced controller connected to the I/O of the real-time simulator. The PMSM drive model runs with an equivalent 10 nanosecond time step (100 MHz FPGA card) and has a latency of 300 ns (PMSM machine and inverter) with the exception of the FEA-computed inductance matrix routines which are updated in parallel on a CPU of the real-time simulator at a 40 us rate. The motor drive is directly connected to digital inputs and analog outputs with 1 microsecond settling time on the FPGA card and has a resulting total hardware-in-the-loop latency of 1.3 microseconds.

Closed-loop control of virtual FPGA-coded permanent magnet synchronous motor drives using a rapidly prototyped controller

Presented in this paper are the results of closed-loop control experiments using a virtual permanent magnet synchronous motor (PMSM) drive implemented on a field-programmable gate array (FPGA) card connected to an external controller. The FPGA-based PMSM motor drive is implemented on an eDRIVEsim simulator, based on the RT-LAB platform. The eDRIVEsim simulator implements 2 types of motor drive models, Park (d-q) and Finite Element Analysis (FEA), on an FPGA card of the simulator. The FPGA-based motor model is designed with Xilinx System Generator (XSG) blockset with no HDL hand coding. Both motor models compute motor currents using a phase-domain algorithm solver that can take into account the instantaneous variation of inductance and non-sinusoidal induced voltage. The FEA-type model uses inductance and Back-EMF profiles computed with JMAG-RT. The d-q model uses sinusoidal induced Back-EMF voltage and phase inductance values computed from Ld and Lq using the well-known Park transformation. A 3-phase IGBT inverter implemented in the FPGA chip drives the PMSM machine. The PWM controller is designed using Rapid Control Prototyping (RCP) methodology based on Simulink. It is implemented on an separate RT-LAB system using standard Opal-RT FPGA-based I/O cards for Analog Input capture and PWM generation. The paper presents results from the closed-loop control of the PMSM drive in both current control and speed control modes and discusses the advantages of using such a virtual test bench for motor drives.