Vincent Lecuire

Fast zonal DCT-based image compression for Wireless Camera Sensor Networks

This paper deals with image compression over Wireless Camera Sensor Networks (WCSNs) in order to decrease the energy consumption of sensors and thus to maintain a long network lifetime. As the radio tranceiver is the most power greedy components of sensor nodes, it seems natural to consider lossy compression before transmission as the appropriate answer to the problem of energy consumption. However, the limitation of sensor nodes in terms of memory as well as processor speed makes most of the compression algorithms inapplicable. Indeed, the most popular methods such as JPEG or JPEG2000 can yield a higher energy consumption than when transmitting uncompressed images. Here we propose to solve this problem by the design of a fast zonal DCT-based image compression algorithm which allows an efficient tuning of the trade-off between energy consumption and image distortion, as shown by experimental results provided in the paper.

Low power hardware-based image compression solution for wireless camera sensor networks

In this paper, we present and evaluate a hardware solution for user-driven and packet loss tolerant image compression, especially designed to enable low power image compression and communication over wireless camera sensor networks (WCSNs). The proposed System-on-Chip is intended to be designed as a hardware coprocessor embedded in the camera sensor node. The goal is to relieve the node microcontroller of the image compression tasks and to achieve high-speed and low power image processing. The interest of our solution is twofold. First, compression settings can be changed at runtime (upon reception of a request message sent by an end user or according to the internal state of the camera sensor node). Second, the image compression chain includes a (block of) pixel interleaving scheme which significantly improves the robustness against packet loss in image communication. We discuss in depth the internal hardware architecture of the encoder chip which is planned to reach high performance running in FPGAs and in ASIC circuits. Synthesis results and relevant performance comparisons with related works are presented. We study a low power hardware solution for image compression in wireless camera sensor network. The goal is to relieve the node microcontroller of the image compression tasks and to achieve low-power image processing. We discuss the internal hardware architecture of the proposed encoder circuit and its implementation. We provide relevant comparisons with related solutions.

Tiny block-size coding for energy-efficient image compression and communication in wireless camera sensor networks

This article presents a lightweight image compression algorithm explicitly designed for resource-constrained wireless camera sensors, called TiBS (tiny block-size image coding). TiBS operates on blocks of 2x2 pixels (this makes it easy for the end-user to conceal missing blocks due to packet losses) and is based on pixel removal. Furthermore, TiBS is combined with a chaotic pixel mixing scheme to reinforce the robustness of image communication against packet losses. For validation purposes, TiBS as well as a JPEG-like algorithm have been implemented on a real wireless camera sensor composed of a Mica2 mote and a Cyclops imager. The experimental results show that TiBS does not provide high compression ratios, but it enables energy-efficient image communication, even for the source camera node, and even for high packet loss rates. Considering an original 8-bpp grayscale image for instance, the amount of energy consumed by the Cyclops/Mica2 can be reduced by around 60% when the image is compressed using TiBS, compared to the scenario without compression. Moreover, the visual quality of reconstructed images is usually acceptable under packet losses conditions up to 40-50%. In comparison, the JPEG-like algorithm results in clearly more energy consumption than TiBS at similar image quality and, of course, its resilience to packet losses is lower because of the larger size of encoded blocks. Adding redundant packets to the JPEG-encoded data packets may be considered to deal with packet losses, but the energy problem remains.

Error resilient image communication with chaotic pixel interleaving for wireless camera sensors

New applications of wireless sensor networks require vision capabilities. Considering the high loss rates found in sensor networks, and the limited hardware resources of current sensor nodes, low-complexity robust image transmission must be implemented, avoiding as much as possible the need for retransmission or redundancy. In this paper we propose a pixel interleaving scheme based in Torus Automorphisms, thus, neighboring pixels are transmitted in different packets. Hence, if packets are lost, we have a high probability of retrieving enough information to obtain an approximation of the original value. Results show an increase of the image quality in comparison with a sequential raw image transmission approach, while preserving similar energy consumptions, time and low-complexity.

Building industrial communication systems based on IEEE 802.11g wireless technology

Industrial communication systems (ICS) are specifically designed for deterministic communication between sensors, actuators, programmable logic controllers, monitoring systems, and operator workstations. These networks are traditionally based on wired technology and a deterministic medium access control. Nowadays, the emerging trend is the availability of wireless technology for ICS, since this leads to more flexible and mobile equipments at reduced cost. This article presents a performance analysis of wireless ICS based on the IEEE 802.11g standardized technology, considering the infrastructure mode with both distributed and point coordination functions. The time-critical messages are handled during the contention free period. The performance analysis allows to validate the ability of 802.11g technology to support time-critical traffic required by wireless ICS, being given the scheduling and characteristics of the messages. In addition, the configuration parameters of access points can be easily derived from the performance analysis

Performance study of IEEE 802.15.4 for industrial maintenance applications

Nowadays, a growing number of enterprises are adopting wireless technologies. However, field communications induce real-time constraints and those networks should at least fulfill those requirements. In this paper, we study IEEE 802.15.4 performances in order to support industrial real-time traffic. This analysis brings out a comparative analysis of IEEE 802.15.4 medium access methods. It provides also some limitations of that standard concerning cycle duration and amount of messages per cycle.

Design and performance analysis of a zonal DCT-based image encoder for Wireless Camera Sensor Networks

Systems mapped on CMOS architectures are often expected to achieve high processing bandwidth and low energy consumption. However, a specific care should be paid to adequate the algorithm structure to the circuit architecture when designing multimedia wireless embedded networking systems. This paper addresses the problem of low power consumption and real time constraints for image communication in wireless camera sensor networks (WCSN). It presents a low-complexity hardware implementation of JPEG-like encoder for image compression and paquetization. The designed circuit is planned to be embedded in the camera sensor node to relieve the main processor of the data processing tasks. This encoder combines the best lifting DCT algorithm of the literature with a zonal coding approach. The former reduces the number of operations required per DCT coefficient while the latter reduces the number of coefficients to be computed, quantized and encoded. We study the tradeoff between the size of the zonal mask (a square zone of size k) and the visual image quality as a function of the compression bitrate, then we describe the hardware features of the JPEG-like circuit when implemented on different FPGAs and ASIC prototypes. Performance evaluation is provided for several ranges of compression bitrate, accordingly with the right value of k. Considering a grayscale image compressed to 0.25bpp for example, k=4 is the best choice. In this case, and for an image of 128x128 pixels, the CMOS circuit of the proposed encoder, synthesized using 45nm integration technology, clocks at 360MHz and consumes 18.02mW. It outperforms most of similar circuits being presented in the literature.

FPGA-based image compression for low-power Wireless Camera Sensor Networks

In this paper, a low-complexity image compression scheme for energy-constrained Wireless Camera Sensor Networks (WCSN) is presented and its hardware implementation cost for FPGA solution is evaluated. The main purpose of this FPGA circuit is to relieve the main microcontroller in the camera sensor node of the image compression tasks and to achieve highspeed and low-power image processing. The interest of our hardware solution is twofold. First, a fast zonal DCT algorithm is used to reduce the number of DCT coefficients in each block of the image to be computed, quantized and encoded. Second, compression settings can be changed at runtime in order to allow a dynamic adjustment of the trade-off between energy consumption and image distortion. The efficiency of the image compression scheme is validated through experimental results using FPGA platform.

Energy consumption analysis of a simple image transmission protocol in wireless sensor networks

This paper proposes and evaluates a simple energyaware image transmission protocol suitable for wireless sensor networks. Energy saving is achieved through the use of a wavelet image transform and a semi-reliable transmission. On the one hand, wavelet image transform provides data decomposition in multiple levels of resolution, so the image can be divided into packets with different priorities. On the other hand, semi-reliable transmission enables priority-based packet discarding by intermediate nodes according to their battery’s state-of-charge. Such approach provides a graceful trade-off between the image quality played out and the sensor nodes lifetime. An analytical performance evaluation in terms of mean dissipated energy is performed. Results show up to 90% reduction in the energy consumption achieved by our proposal compared to a non energy-aware transmission.

Efficient hardware solution for low power and adaptive image-compression in WSN

In this paper, we present and evaluate a hardware implementation for user-driven and packet-loss tolerant image compression, especially designed to enable low-power image compression and communication over wireless sensors networks (WSNs). The proposed compression scheme, presented as a CMOS circuit, is intended to be embedded in the camera sensor. It will be considered as a co-processor for tasks related with image compression and data packetization, which unloads the main microcontroller so that it will spend less time in active mode. The interest of our solution is twofold. First, compression settings can be changed at runtime (upon reception of a request message sent by an end-user or according to the internal state of the camera sensor node). Second, the image compression chain includes a (block of) pixel interleaving scheme which significantly improves the robustness against packet loss in image communication. The main part of this paper focuses on the specification and the performances analysis of this solution when implemented on FPGA and ASIC circuits.