Vincenzo d’Alessandro
University of Naples Federico II
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Publication
Featured researches published by Vincenzo d’Alessandro.
Microelectronics Reliability | 2013
Vincenzo d’Alessandro; Alessandro Magnani; M. Riccio; Yohei Iwahashi; Giovanni Breglio; N. Rinaldi; Andrea Irace
Abstract This paper presents an accurate, yet computationally effective, 3-D simulation strategy devised for the UIS analysis of multicellular power transistors, which accounts for electrothermal effects and is based on a circuit representation of the whole device under test. The approach is exploited to examine the correlation between the shape of the avalanche curve of IGBTs and the physical mechanisms occurring during UIS discharging. In particular, an in-depth investigation is performed on a current hopping phenomenon that – although not usually destructive – entails a reduction in both ruggedness and reliability of the device.
International Journal of Photoenergy | 2015
P. Guerriero; Fabio Di Napoli; Vincenzo d’Alessandro; S. Daliento
A maximum power tracking algorithm exploiting operating point information gained on individual solar panels is presented. The proposed algorithm recognizes the presence of multiple local maxima in the power voltage curve of a shaded solar field and evaluates the coordinated of the absolute maximum. The effectiveness of the proposed approach is evidenced by means of circuit level simulation and experimental results. Experiments evidenced that, in comparison with a standard perturb and observe algorithm, we achieve faster convergence in normal operating conditions (when the solar field is uniformly illuminated) and we accurately locate the absolute maximum power point in partial shading conditions, thus avoiding the convergence on local maxima.
IEEE Transactions on Electron Devices | 2014
Vincenzo d’Alessandro; Grazia Sasso; N. Rinaldi; Klaus Aufinger
An extensive on-wafer experimental campaign is carried out to determine the thermal resistance dependence on scaling and emitter geometry in state-of-the-art toward-THz silicon-germanium bipolar transistors designed and fabricated within the framework of the European DOTFIVE project. The extraction is performed through a robust procedure which-differently from classic approaches-exploits an accurately calibrated thermometer relating base-emitter voltage to junction temperature. Experimental data are then used to assess the accuracy of scalable thermal resistance laws for advanced transistor models; it was found that at least four parameters are needed to ensure a favorable agreement over wide ranges of emitter widths and lengths.
IEEE Transactions on Components, Packaging and Manufacturing Technology | 2014
Lorenzo Codecasa; Vincenzo d’Alessandro; Alessandro Magnani; N. Rinaldi
A novel nonlinear model order reduction method is proposed for constructing one-port dynamic compact models of nonlinear heat diffusion problems for ultra-thin chip stacking technology. The method leads to models of small state-space dimensions, which allow accurately reconstructing the whole time evolution of the temperature field due to an arbitrary power waveform of practical interest. The approach is also efficient, since the computational time/memory requirements for constructing each dynamic compact model is about one order of magnitude lower than that corresponding to a single 3-D finite element method transient simulation of a nonlinear problem.
Microelectronics Reliability | 2013
Andre G. Metzger; Vincenzo d’Alessandro; N. Rinaldi; Peter J. Zampardi
Three layout-based techniques designed to equalize the temperature distribution in GaAs HBT output arrays of Power Amplifiers (PAs) are evaluated. Electrothermal simulation results show that a reduction in the range of 4–5% of the peak of the junction temperature rise over ambient can be achieved with a negligible increase in design complexity and area, and that up to 7% can be obtained by further optimizing the distribution of base ballast resistors. This is a positive outcome in regards to long-term device reliability since the probability of a failure is reduced when the highest junction temperature in the array is decreased. However, and extensive experimental characterization of PAs incorporating the array variants reveals that the temperature reductions are too low to yield quantifiable improvements in RF performance and ruggedness.
Journal of Vibration and Control | 2015
Giuseppe Petrone; Vincenzo d’Alessandro; F. Franco; Sergio De Rosa
Problems involving vibrations occur in many fields of engineering. Thus, it is necessary to increase the knowledge of the damping, offered by new structural configurations and materials in order to reduce the vibration levels. The present paper focuses its attention on the measurements of the structural loss factor of different types of sandwich panels made of eco-friendly materials. The interest in natural materials, for structural applications, has considerably increased in the last years thanks to the growing environmental concerns. The influence on the loss factor of face sheet materials, core types and configurations is experimentally evaluated by means of measurements of the reverberation time (RT60). The reported data represent a good initial database for more detailed analyses of these new materials.
Archive | 2011
N. Rinaldi; Salvatore Russo; Vincenzo d’Alessandro
Detailed three-dimensional (3D) numerical thermal simulations are employed to clarify the influence of the key technological parameters and material properties on the thermal behaviour of ultra-thin chip stacking modules, wherein the heat removal from the thinned active dies is considerably hampered by benzocyclobutene layers. In particular, the impact of heat source area and thickness of silicon dies and benzocyclobutene layers is investigated in structures with one, two, and three thin silicon dies. The adoption of compact thermal models is then suggested as a solution to reduce the computational resources required to numerically analyse stacked-die modules.
Microelectronics Reliability | 2012
A. Villamor-Baliarda; Piet Vanmeerbeek; M. Riccio; Vincenzo d’Alessandro; Andrea Irace; Jaume Roig; D. Flores; Peter Moens
Abstract One of the most important process parameters impacting the electrical performance in Super Junction (SJ) devices is the Charge Balance (CB). This paper demonstrates that the avalanche current capability in SJ diodes is not only dependent on the CB of the structure but also on the periphery design. It is observed from infrared (IR) thermography that the conducting area during Unclamped Inductive Switching (UIS) differs by modifying CB. These measurements are combined with TCAD simulations to link the failure mechanism to the appearance of a negative resistance branch in the I–V characteristic.
Solid-state Electronics | 2010
Salvatore Russo; Luigi La Spina; Vincenzo d’Alessandro; N. Rinaldi; Lis K. Nanver
Abstract The impact of layout parameters on the steady-state thermal behavior of bipolar junction transistors (BJTs) with full dielectric isolation is extensively analyzed by accurate DC measurements and 3-D numerical simulations. The influence of the aspect ratio of the emitter stripe, as well as the consequences of device scaling, are investigated from a thermal viewpoint. Furthermore, the beneficial effect of implementing aluminum nitride (AlN) thin-film heatspreaders is examined. It is shown that the silicon area surrounding the heat source, as well as the distance to high-thermal-conductivity regions, can have a significant impact on the thermal behavior. A recently proposed scaling rule for the thermal resistance – fully compatible with advanced transistor models – is successfully applied to a series of test BJT structures provided that a simple parameter optimization is carried out. Based on this, some generally applicable guidelines are given to effectively downscale fully-isolated bipolar transistors without significantly worsening the thermal issues.
International Journal of Pancreatology | 1989
Giulio Belli; Giovanni Romano; Vincenzo d’Alessandro; Mario Luigi Santangelo
SummarySevere hemorrhage from pancreatic pseudocysts is a rare condition that poses a diagnostic and therapeutic challenge.Two cases of preoperative intracystic bleeding and massive postoperative gastrointestinal hemorrhage observed during the last year form the basis of the present report.In the first patient, transcystic suture ligation of the bleeding vessel was necessary to control this life-threatening and dramatic condition—External drainage of the cyst was followed by an uneventful postoperative course. In the second patient, massive gastrointestinal bleeding occurred after cysto-gastrostomy, and neither endoscopy nor arteriography was able to identify the source. Despite aggressive medical and surgical therapy, the patient died. Massive intracystic or gastrointestinal hemorrhage caused by rupture of pseudoaneurysms into pancreatic pseudocysts still remains a rare but severe condition, difficult to treat and affected by high mortality rates.Angiography should be performed routinely in the preoperative assessment of pancreatic pseudocysts, even when the other diagnostic techniques do not raise the suspicion of pseudoaneurysm formation. After internal drainage procedures early surgery is recommended whenever GI bleeding occurs in the postoperative course.