Viranjay M. Srivastava

Design and performance analysis of double-gate MOSFET over single-gate MOSFET for RF switch

In this paper, we have designed a double-gate MOSFET and compared its performance parameters with the single-gate MOSFET as RF CMOS switch, particularly the double-pole four-throw (DP4T) switch, for the wireless telecommunication systems. A double-gate radio-frequency complementary metal-oxide-semiconductor (DG RF CMOS) switch operating at the frequency of microwave range is investigated. This RF switch is capable to select the data streams from antennas for both the transmitting and receiving processes. We emphasize on the basics of the circuit elements (such as drain current, threshold voltage, resonant frequency, resistances at switch ON condition, capacitances, and switching speed) required for the integrated circuit of the radio frequency sub-system of the DG RF CMOS switch and the role of these basic circuit elements are also discussed. These properties presented in the switches due to the double-gate MOSFET and single-gate MOSFET have been discussed.

Design and performance analysis of cylindrical surrounding double-gate MOSFET for RF switch

In this paper, we have analyzed the design parameters of Cylindrical Surrounding Double-Gate (CSDG) MOSFETs as an RF switch for the advanced wireless telecommunication systems. The proposed CSDG RF MOSFET is operated at the microwave regime of the spectrum. We emphasize on the basics of the circuit elements such as drain current, threshold voltage, resonant frequency, resistances at switch ON condition, capacitances, energy stored, cross talk and switching speed required for the integrated circuit of the radio frequency sub-system of the CSDG RF CMOS device and the physical significance of these basic circuit elements is also discussed. We observed that the total capacitance between the source to drain for the proposed CSDG MOSFET is more compared to the Cylindrical Surrounding Single-Gate (CSSG) MOSFET due to the greater drain current passing area of the CSDG MOSFET, which reveals that the isolation is better in the CSDG MOSFET compared to that of the simple double-gate MOSFET and single-gate MOSFET. We analyzed that the CSDG MOSFET stores more energy (1.4 times) as compared to the CSSG MOSFET. Therefore, the CSDG MOSFET has more stored energy. The ON-resistance of CSDG MOSFET is half than that of the double-gate MOSFET and single-gate MOSFET, which reveals that the current flow from source to drain in CSDG MOSFET is better than the double-gate MOSFET and single-gate MOSFET.

Application of VEE Pro Software for Measurement of MOS Device Parameters using C-V curve

For a capacitor formed of MOS device using Metal-silicon dioxide-silicon (MOS) layers with an oxide thickness of 528 A (measured optically), some of the material parameters were found from the curve drawn between Capacitance vs Voltage (C-V) through the Visual Engineering Environment Programming (VEE Pro) software. To perform the measurment, process by a distance, from the hazardous room, we use VEE Pro software. In this research, to find good result, vary the voltage with smaller increments and perform the measurements by vary the applying voltage from +7V to -7V and then back to +7V again and then save this result in a Data sheet with respect to temperature, volage and frequency using this program.

Double Pole Four Throw switch design with CMOS inverter

To avoid the uses of multiple RF chain associated with the multiple antennas, RF switch is most essential component. Multiple antennas systems are used to replace traditional single antennas circuitry in the radio transceiver system in order to improve the transmission capability and reliability. The desired switching system must have low cost and simple structure, yet still can capture all the advantage of Multiple Inputs Multiple Output (MIMO) systems. In this paper, we have proposed a Double Pole Four Throw (DP4T) RF switch using Complementary Metal Oxide Semiconductor (CMOS) technology with inverter property. This switch is low in cost, and capable of selecting data streams to or from the two antennas for transmitting or receiving processes, respectively.

Measurement of Oxide Thickness for MOS Devices, Using Simulation of SUPREM Simulator

A procedure to characterize oxide thickness and conductor layers that are grown or deposited on semiconductor is by studying the characteristics of a MOS capacitor that is formed of the conductor - insulator - semiconductor layers. For a capacitor formed with oxide thickness of 510 A (measured optically), here in this research author measures the oxide thickness by the SUPREM Simulator. Its accuracy depends on the quality of models, parameters and numerical techniques it employ. Authors also verify the result by measurment of capacitance at different voltages using LCR meter and the curve drawn through Visual Engineering Environment Programming (VEE Pro) software. Based on the oxide thickness measurement of a MOS capacitor, one can measure the device parameters, mainly the substrate dopant concentration and other parameter. This research was completed in BEL Laboratory.

ANALYSIS OF DRAIN CURRENT AND SWITCHING SPEED FOR SPDT SWITCH AND DPDT SWITCH WITH THE PROPOSED DP4T RF CMOS SWITCH

Conventional CMOS switch uses NMOS as transistors in its main architecture requiring a control voltage of 5.0 V and a large resistance at the receivers and antennas (ANTs) to detect the signal. A CMOS integrated circuit switch uses FET transistors to achieve switching between multiple paths, because of its high value of control voltage. Hence it is not suitable for modern portable devices which demand lesser power consumption. Therefore, we proposed a new Double-Pole Four-Throw (DP4T) switch by using RF CMOS technology and analyzed its performance. Further, main objective is to provide a plurality of such switches arranged in a densely configured switch array, where the power and area could be reduced as compared to already existing switch configuration as SPDT and Double-Pole Double-Throw (DPDT) transceiver switches, which is simply a reduction of signal strength during transmission of the RF signals. The presented result for the proposed DP4T switch reveals the peak output currents (drain current) around 0.116–0.387 mA and a switching speed of 19–36 ps.

Capacitive Model and S-Parameters of Double-Pole Four-Throw Double-Gate RF CMOS Switch

In this paper, we have analyzed the Double-Pole Four-Throw Double-Gate Radio-Frequency Complementary Metal-Oxide-Semiconductor (DP4T DG RF CMOS) switch using S-parameters for 1 GHz to 60 GHz of frequency range. DP4T DG RF CMOS switch for operation at high frequency is also analyzed with its capacitive model. The re-sults for the development of this proposed switch include the basics of the circuit elements in terms of capacitance, re-sistance, impedance, admittance, series equivalent and parallel equivalent of this network at different frequencies which are present in this switch whatever they are ON or OFF.

Double-Pole Four-Throw RF CMOS switch design with double-gate transistors

In this paper, we have explored the design features of a Double-Pole Four-Throw (DP4T) RF CMOS switch with use of a novel Vertical Slit Field Effect Transistor (VSFET). This proposed switch circuit uses the double-gate which minimizes the number of transistors and increases the logic density of the transistor per unit area as compare to simple switch. These double gates are independently controlled. This will provide a switch with a drive circuit that free from signal propagation delay and additional voltage power supply. Further, main objective is to provide a plurality of such switches arranged in a densely configured switch array, where the power and circuit area is reduced as compared to a tied gate configuration.

Analysis of attenuation, isolation and switching speed of DP4T double gate RF CMOS switch design

In this paper, we have discussed the attenuation with ON resistance, isolation and switching speed of a Double-Pole Four-Throw (DP4T) RF CMOS switch, with properties of symmetric double-gate (DG) MOSFET to make obvious the advantages for DG circuits and reduce the number of transistors which increases the circuit density per unit area in addition to functionality as compare to simple CMOS switch. This provides a switch with a better attenuation, isolation and switching speed to drive the circuit that does not add appreciable signal propagation delay and does not require additional voltage power supply.

Triple band regular decagon shaped metamaterial absorber for X-band applications

In this research work, the design characterization of metamaterial absorber has been investigated for X-band applications. For this purpose, a primary regular decagon shaped loop structure has chosen and its multi band response has been studied and analyzed. The simulated results show that absorption peaks occur at 8 GHz, 10 GHz and 12 GHz with absorbance peak response of 96 %, 93.36 % and 91.88 % with full width at half maximum (FWHM) bandwidth of 5.72 %, 4.00 % and 3.80 % respectively. By proper arrangement, we have achieved the absorption peaks for triple frequency band at incident electromagnetic wave. The scalability property of metamaterials was utilized. Field analysis reveals that the frequency selective surface (FSS) unit cell absorbers resonance peaks occur, when the intrinsic impedance of the regular decagon shaped structure matches with the free space impedance. The proposed absorber is predicted to be useful in various potential applications like stealth technology for aircraft, ships, military vehicles, ballistic missiles. Moreover, the design idea has the ability to be extended further to microwave, optical and terahertz regime.