Vladimir Kovacevic

A real-time wavelet-domain video denoising implementation in FPGA

The use of field-programmable gate arrays (FPGAs) for digital signal processing (DSP) has increased with the introduction of dedicated multipliers, which allow the implementation of complex algorithms. This architecture is especially effective for data-intensive applications with extremes in data throughput. Recent studies prove that the FPGAs offer better solutions for real-time multiresolution video processing than any available processor, DSP or general-purpose. FPGA design of critically sampled discrete wavelet transforms has been thoroughly studied in literature over recent years. Much less research was done towards FPGA design of overcomplete wavelet transforms and advanced wavelet-domain video processing algorithms. This paper describes the parallel implementation of an advanced wavelet-domain noise filtering algorithm, which uses a nondecimated wavelet transform and spatially adaptive Bayesian wavelet shrinkage. The implemented arithmetic is decentralized and distributed over two FPGAs. The standard composite television video stream is digitalized and used as a source for real-time video sequences. The results demonstrate the effectiveness of the developed scheme for real-time video processing.

An Approach to Internet-Based Virtual Call Center Implementation

The era of classical PBX-based call centers has passed. Those systems were proprietary and closed, i.e. with fixed functionality. Today, the Internet and multimedia applications are becoming more and more popular across the world, and there is a lot of effort in both academia and industry to build and deploy modern Internet-based call centers. This paper should be viewed as a contribution to these efforts. It presents our approach to Internetbased virtual call center implementation. In contrast to other efforts, we consider the virtual call center as a universal infrastructure, which could be used as a telecommunication management network center and as an intelligent network service control point, too. In the paper we present our concept, the most interesting implementation details, and pilot network configuration.

Application development environment of an integrated SCADA system

The paper presents the concept and characteristics of a PC based integrated control system named GAUS. Special attention is paid to the application software development and testing methodology, oriented to the realization of complex industrial applications demanding distributed architecture and extensive batch control. Control over the large processing systems is facilitated by a decision support environment, based on system history and a neural network/self-organizing fuzzy modeling approach.

A formal software verification concept based on automated theorem proving and reverse engineering

Formal software verification typically involves some levels of static theorem proving which is a mathematical process of proving that the function computed by a program match the function specified. A theorem prover, such as THEO, automates this process. On the other hand, reverse engineering is a process inverse to traditional engineering. An example extracts the software specification from its source code. In this paper we present a formal software verification concept, which is based on automated theorem proving and reverse engineering. We are mainly concerned with communications software and with software for families of communication protocols in particular. In the paper we describe how to: (1) model a group of finite state machines using predicate calculus; (2) extract axiomatic software specification from the source code and log files; and (3) formally verify software for a given operational profile (set of test cases). The concept has been successfully applied to a call processing software for systems, which are installed and fully operational in Moscow and Saint Petersburg, Russia.

FPGA design and implementation of a wavelet-domain video denoising system

Multiresolution video denoising is becoming an increasingly popular research topic over recent years. Although several wavelet based algorithms reportedly outperform classical single-resolution approaches, their concepts are often considered as prohibitive for real-time processing. Little research has been done so far towards hardware customization of wavelet domain video denoising. A number of recent works have addressed the implementation of critically sampled orthogonal wavelet transforms and the related image compression schemes in Field Programmable Gate Arrays (FPGA). However, the existing literature on FPGA implementations of overcomplete (non-decimated) wavelet transforms and on manipulations of the wavelet coefficients that are more complex than thresholding is very limited. In this paper we develop FPGA implementation of an advanced wavelet domain noise filtering algorithm, which uses a non-decimated wavelet transform and spatially adaptive Bayesian wavelet shrinkage. The standard composite television video stream is digitalized and used as source for real-time video sequences. The results demonstrate the effectiveness of the developed scheme for real time video processing.

A concept of an integrated development environment for reactive systems

One of the main application areas of modern engineering in computer based systems is development, production, deployment and maintenance of reactive systems. Today, the majority of functions in such systems are implemented in software, and modeled as a group of finite state machines (automata). The past decade has seen many R&D efforts in development of tool sets that support software production processes, in area of reactive systems, in both industry and academia. This paper is our contribution to this movement. We present a concept of an integrated development environment for a class of problems known as finite state machines. The concept is suitable for small and medium size high-tech software R&D teams, where most of the team members participate in majority of phases of a software development cycle.

Use of Publisher-Subscriber Design Pattern in Infrastructure of Distributed IDS Systems

In this paper we have approached one problem in development of distributed intrusion detection systems (IDS), namely realization of communications among its nodes. During the last few years, a significant trend towards building of highly distributed IDS systems could be noticed. In this situation a reliable communications solution that would enable updating of signature bases and alert notification is required. We propose use of subscriber-publisher design pattern for this purpose. Data schemes that could be used in this case are described.

A Generic Embedded Robot Platform for Real Time Navigation and Telepresence Abilities

This paper presents a generic embedded robot platform concept that meets functional and real time requirements. The described concept allows easy system extension with new components, simple configuration and implementation of advanced features. Design and development of such complex system poses significant challenges and requires knowledge from several scientific fields as: mechanics, electronics, software and computer engineering. Proposal for hardware control units of these robots is based on the modern families of microcontrollers and DSPs coprocessors which are relevant for autonomous mobile application regarding requirements for interfaces, processing power, memory and power consumption. Typical software for robots generally includes control/navigation and communication functions. In the last decade multimedia software technologies also took place in the robotic system architecture to improve robot capabilities. The concept is proposed after analysis of spatial, temporal, and functional requirements. It involves a generic architecture using modular hardware design and software component based approach. The concept is illustrated by typical use case -- wireless/wired controlled robot. Besides basic navigation commands set, it is able to transmit audio and video information. This provides telepresence impression to the remote operator. The presented approach offers a convenient/flexible platform for further development focused on specific areas such as: intelligent navigation, sensor arrays, wireless networking, human machine interaction, audio and video processing.

Software testing concept used for MAS/C-compiler

The paper presents a software testing concept used for MICRONAS Intermetall MAS DSP C compiler MAS/C-Compiler. The concept is based on a specially developed software testing tool, which asserts whether the application generated by MAS/C-Compiler is valid or not. If not, it helps compiler designers to localize the bug, and to eliminate it. Compiler testing is viewed as a continual process. For each new compiler test case, the following two steps are conducted: (i) reference error-free source code is designed using commercially available high quality C++ reference compilers; (ii) a specially developed bit-exact testing tool is used to compare outputs of application produced by reference compiler and application produced by MAS/C-Compiler. Based on this comparison, bug localization and elimination is possible.

An approach in fast IC development for digital video processing based on FPGAs

This paper presents an environment for fast development of integrated circuits for digital video processing based on FPGAs (field programmable gate arrays). The environment described provides fully digital signal processing of television pictures in real-time. Principles are described through an example of an integrated circuit for scan rate conversion design.