W. M. Mansfield

The Vertical Replacement-Gate (VRG) MOSFET: a 50-nm vertical MOSFET with lithography-independent gate length

We have fabricated and demonstrated a new device called the Vertical Replacement-Gate (VRG) MOSFET. This is the first MOSFET ever built that combines (1) a gate length controlled precisely through a deposited film thickness, independently of lithography and etch, and (2) a high-quality gate oxide grown on a single-crystal Si channel. In addition to this unique combination, the VRG-MOSFET includes a self-aligned S/D formed by solid source diffusion (SSD) and small parasitic overlap, junction, and S/D capacitances. The drive current per /spl mu/m of coded width is significantly higher than that of advanced planar MOSFETs because each rectangular device pillar (with a thickness of minimum lithographic dimension) contains two MOSFETs driving in parallel. All of this is achieved using current manufacturing methods, materials, and tools, and competitive devices with 50-nm gate lengths (L/sub G/) have been demonstrated without advanced lithography.

Measurement of the Casimir Force between a Gold Sphere and a Silicon Surface with Nanoscale Trench Arrays

We report measurements of the Casimir force between a gold sphere and a silicon surface with an array of nanoscale, rectangular corrugations using a micromechanical torsional oscillator. At distances between 150 and 500 nm, the measured force shows significant deviations from the pairwise additive formulism, demonstrating the strong dependence of the Casimir force on the shape of the interacting bodies. The observed deviation, however, is smaller than the calculated values for perfectly conducting surfaces, possibly due to the interplay between finite conductivity and geometry effects.

Low leakage, ultra-thin gate oxides for extremely high performance sub-100 nm nMOSFETs

Reports measurements of the DC characteristics of sub-100 nm nMOSFETs that employ low leakage ultra-thin gate oxides only 1-2 nm thick to achieve high current drive capability and transconductance. We demonstrate that I/sub Dsat//spl ap/1.8 mA//spl mu/m can be achieved with a 60 nm gate at 1.5 V using a 1.3-1.4 nm gate oxide with a gate leakage current less than 20 nA//spl mu/m/sup 2/. Furthermore, we find that I/sub Dsat/ deteriorates for gate oxides thicker or thinner than this.

1296-port MEMS transparent optical crossconnect with 2.07 petabit/s switch capacity

A 1296-port MEMS transparent optical crossconnect with 5.1dB/spl plusmn/1.1dB insertion loss at 1550 nm is reported. Measured worst-case optical crosstalk in a fabric was n38 dB and nominal switching rise/fall times were 5 ms. A 2.07 petabit/s switch capacity was verified upon cross-connecting a forty-channel by 40 Gb/s DWDM data stream through a prototype fabric.

The ballistic nano-transistor

We have achieved extremely high drive current performance and ballistic (T>0.8) transport using ultra-thin (<2 nm) gate oxides in sub-30 nm effective channel length nMOSFETs. The peak drive performance in an nMOSFET was observed at t/sub ox//spl ap/1.3 nm for a 1.5 V power supply voltage with T/sub n//spl ap/0.7, while the peak performance in a pMOSFET was observed at t/sub ox//spl ap/1.5 nm for a -1.5 V supply with T/sub p//spl ap/0.5. Since the carrier scattering in the channel is due predominately to interface roughness, reducing the transverse surface field, either by reducing the gate voltage or by increasing the oxide thickness, can be used to improve the transmittance T/sub n//spl rarr/0.85, T/sub p//spl rarr/0.6, while diminishing the drive current.

Nanopores in solid-state membranes engineered for single molecule detection

A nanopore is an analytical tool with single molecule sensitivity. For detection, a nanopore relies on the electrical signal that develops when a molecule translocates through it. However, the detection sensitivity can be adversely affected by noise and the frequency response. Here, we report measurements of the frequency and noise performance of nanopores </=8 nm in diameter in membranes compatible with semiconductor processing. We find that both the high frequency and noise performance are compromised by parasitic capacitances. From the frequency response we extract the parameters of lumped element models motivated by the physical structure that elucidates the parasitics, and then we explore four strategies for improving the electrical performance. We reduce the parasitic membrane capacitances using: (1) thick Si(3)N(4) membranes; (2) miniaturized composite membranes consisting of Si(3)N(4) and polyimide; (3) miniaturized membranes formed from metal-oxide-semiconductor (MOS) capacitors; and (4) capacitance compensation through external circuitry, which has been used successfully for patch clamping. While capacitance compensation provides a vast improvement in the high frequency performance, mitigation of the parasitic capacitance through miniaturization offers the most promising route to high fidelity electrical discrimination of single molecules.

Design and fabrication of high-efficiency beam splitters and beam deflectors for integrated planar micro-optic systems

High-frequency gratings with rectangular-groove profiles are used to generate high-efficiency beam splitters and beam deflectors. The effects of the grating design parameters, i.e., period, groove depth, duty cycle, number of phase levels, and polarization state (TE and TM) of the incoming signal, are considered. The case of the binary beam splitter grating is analyzed by using rigorous electromagnetic grating analysis. Fabrication techniques are presented in which three different lithographic techniques are considered (optical contact, deep-UV stepper reduction, and electron-beam direct write). Experimental results of 97% efficiency for the beam splitter grating and up to 80% for the beam deflector grating are reported.

Beyond the gene chip

We describe a prospective strategy for reading the encyclopedic information encoded in the genome: using a nanopore in a membrane formed from a metal-oxide semiconductor (MOS)-capacitor to sense the charge in deoxyribonucleic acid (DNA). In principle, as DNA permeates the capacitor-membrane through the pore, the electrostatic charge distribution characteristic of the molecule should polarize the capacitor and induce a voltage on the electrodes that can be measured. Silicon nanofabrication and molecular dynamic simulations with atomic detail are technological linchpins in the development of this detector. The sub-nanometer precision available through silicon nanotechnology facilitates the fabrication of the detector, and molecular dynamics provides us with a means to design it and analyze the experimental outcomes.

Diffraction-limited soft-x-ray projection imaging using a laser plasma source

Projection imaging of 0.1-microm lines and spaces is demonstrated with a Mo/Si multilayer coated Schwarzschild objective and 14-nm illumination from a laser plasma source. This structure has been etched into a silicon wafer by using a trilevel resist and reactive ion etching. Low-contrast modulation at 0.05-microm lines and spaces is observed in polymethylmethacrylate.

Casimir force on a surface with shallow nanoscale corrugations: geometry and finite conductivity effects.

We measure the Casimir force between a gold sphere and a silicon plate with nanoscale, rectangular corrugations with a depth comparable to the separation between the surfaces. In the proximity force approximation (PFA), both the top and bottom surfaces of the corrugations contribute to the force, leading to a distance dependence that is distinct from a flat surface. The measured Casimir force is found to deviate from the PFA by up to 10%, in good agreement with calculations based on scattering theory that includes both geometry effects and the optical properties of the material.