Walter Daves

Charge trapping in gate-drain access region of AlGaN/GaN MIS-HEMTs after drain stress

In this paper we investigate the drain stress behavior and charge trapping phenomena of GaN-based high electron mobility transistors (HEMTs). We fabricated GaN-on-Si MIS-HEMTs with different dielectric stacks in the gate and gate drain access region and performed interface characterization and stress measurements for slow traps analysis. Our results show a high dependency of the on-resistance increase on interfaces in the gate-drain access region. The dielectric interfaces near the channel play a significant role for long term high voltage stress and regeneration of the device.

4H-SiC MOSFETs with a Stable Protective Coating for Harsh Environment Applications

In this work we present 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) with a stable protective coating for harsh environment applications. Both inversion channel (IC) and buried channel (BC) MOSFETs were realized on n-4H-SiC substrates with a p-epilayer. Stacked ONO gate dielectric and Ti/TiN/Pt/Ti interconnect were used. Ni and Ti ohmic contacts in combination with a-SiOx/a-SiNy and a-SiOx/a-SiC protective coatings were compared. The MOSFETs showed excellent transistor characteristics up to 600 °C and exceptional stability during long-term aging at 600 °C in air and during accelerated aging at 700 °C including temperature cycling and air/moisture environment.

Comparative Study on Metallization and Passivation Materials for High Temperature Sensor Applications

We investigated the performance of different metallization/passivation systems for high temperature applications. The metallizations comprised a 150 nm sputtered Pt or a 150 nm e-beam evaporated PtRh layer on Ti/TiN underlayers, respectively. The passivation coatings consisted of amorphous PECVD SiOx, of amorphous stress-reduced PECVD SiNy, and of a SiOx/ SiNy stack. For samples with SiOx and SiOx/ SiNy passivation layers the electrical properties changed after a short high temperature anneal at 600 °C but then remained stable during further annealing. This was attributed to the formation of PtTi alloys, which stabilized the metallization stack. In samples with SiNy passivation a significant Pt out-diffusion into the passivation layer was observed. This led to a degradation of the electrical and mechanical properties. The best performance was achieved with Pt-based metallizations and SiOx or SiOx/SiNy passivations.

Poly-silicon CMOS compatible gate module for AlGaN/GaN-on-silicon MIS-HEMTs for power electronics applications

In this paper we present a new poly-silicon gate process for AlGaN/GaN MIS-HEMT power transistors. Using a complete metal-free front-end processing of the gate module the process is fully CMOS compatible. Additionally, the gate reliability can be significantly increased. We used a three-step LPCVD SiN passivation fully enclosing the gate electrode made of polycrystalline silicon. As gate dielectrics LPCVD deposited SiN are used with a thickness of 20 nm and 120 nm. We compared these devices with MIS-HEMTs using Al as gate electrode. Constant current measurements have been performed that show with QBD, poiy, 20 nm = 714 C/cm2 and a MTTF0.5A/cm2 = 1293s significant higher charge pumping capability through the gate for the poly-Si gated devices compared to conventional metal gates.