Warsame H. Ali

Load Disturbance Resistance Speed Controller Design for PMSM

This paper presents an linear-quadratic-regulator-based proportional-integral-differential equivalent controller design method for a permanent-magnet synchronous motor. The disturbance rejection is achieved based on a multi-objective observer in which observation error is purposely retained and utilized in load disturbance compensation. This makes disturbance rejection tuning independent of the adjustment for speed command tracking; and the disturbance compensation is an integrated part of the controller output, which reduces the chance of input or state saturation. A robust stability analysis is also included for the modeling error. The proposed methodology is implemented through the dSPACE digital signal processor system, and the experimental result confirms its effectiveness

A novel approach for K-best MIMO detection and its VLSI implementation

Since the complexity of MIMO detection algorithms is exponential, the K-best algorithm is often chosen for efficient VLSI implementation. This detection problem is often viewed as a tree search problem where the breadth first search (BFS) method is adopted and only the K-best branches are kept at each level of the tree. An earlier VLSI implementation of the K-best BFS has been reported, however it has an inherent speed bottleneck due to the calculation of many path metrics and then sorting among them to select the K-best. In this paper an alternative implementation of the BFS is presented, which is suitable for VLSI implementation. To test the performance of this approach it has been applied to a 4X4 MIMO detector with a 64 QAM constellation. The results show less than 1 dB degradation from the sphere decoding algorithm. The implementation of a single spiral cell, the basic block behind the system, occupies a 764 mum2 of area and consumes a 52.58 muw of power a 0.13 mum CMOS technology.

Wavelet-based differential nonlinearity testing of mixed signal system ADCs

This paper discusses the work done in the testing and measurement of differential nonlinearity (DNL) of analog- to-digital converters (ADCs) by applying a novel testing technique of wavelet transform. The results of the new method are compared with conventional testing methods. The wavelet transform technique shows significant advantage over the conventional techniques.

Design of a speed controller using Extended Kalman Filter for PMSM

A novel design of a proportional-integral-differential equivalent controller using state observer based Extended Kalman Filter (EKF) for a Permanent Magnet Synchronous Motor (PMSM) is proposed. The EKF is constructed to achieve a precise estimation of the speed and current from the noisy measurement. Linear Quadratic Regulator (LQR) technique is used to construct a proportional integral derivative (PID) controller to achieve the speed command tracking performance. The proposed method greatly enhances the speed control performance. The simulation results for the speed response and variation of the states when the PMSM is subjected to the load disturbance are presented. The results verify the effectiveness of the proposed method.

Digital controller design for analog MIMO systems with multiple I/O delays

This paper proposes a discretization scheme and an optimal digital cascaded plus state-feedback controller for Multiple-Input-Multiple-Output (MIMO) continuous-time systems with multiple time delays in both inputs and outputs. Firstly, an equivalent discrete-time model is obtained from the MIMO analog time-delayed system. The equivalent discrete-time model and a partially predetermined digital cascaded controller are formulated as an augmented discrete-time state-space system for state-feed forward and state-feedback Linear Quadratic Regulator (LQR) design. As a result, the parameters of the cascaded controller and its associated state-feedback controller can be determined by tuning the weighting matrices in the LQR optimal design. Then a discrete-time optimal observer for the MIMO analog time-delayed system is constructed for the implementation of the designed state-feedback digital controller. The proposed methodology has been verified through both simulation and experiment on the induction motor drive system.

Linearization modeling for non-smooth dynamical systems with approximated scalar sign function

Traditionally, one typical way to deal with the sign function constrained non-smooth system is to divide the state space into two or more subspaces based on the direction of sign function. The resulting piecewise model is with complicated structure, leading to the difficulty in controller design as well as stability analysis. In this paper, an innovative concept of approximated scalar sign function is introduced. Through the proposed methodology, the non-smooth dynamical system model can be transformed into a universal and smooth model. Thus, the following optimal linearization can be applied to obtain the local linear model at any operating point. Finally, two illustrative examples, representing hysteresis and friction, respectively, are given to demonstrate the effectiveness of the proposed method.

A continuous-time sigma-delta ADC with tunable pass-band for multi-standard applications

In this paper, we present a tunable continuous-time band-pass sigma-delta (ΣΔ) analog-to-digital converter (ADC). Our design is suitable for multi-standard multi-user applications. Additionally, the tunability advantage enhances the obtainable resolution while reducing the power consumption by only operating in the desired bandwidth from the reserved bandwidth required for ADCs application. Our simulation results demonstrate that a relatively high SNR can be obtained using the designed ΣΔ ADC. We provide an implementation of the designed ADC using Gm-C circuits with 0.18μm IBM CMOS technology. The circuit operates with 8MHz clock frequency and achieves 57.6dB Signal to Noise and Distortion Ratio (SNDR) with 20KHz bandwidth. At the mentioned clock frequency and 1.5V supply level, the circuit consumes less than 1mW power. Our HSPICE simulation results are in very good agreement with our simulated model based on second order modified all-pass transfer functions. The effective number of bits obtained from our implemented ADC was observed to be ENOB=9.28 bits.

Variability analysis of tent map-based chaotic-map truly random number generators

Although discrete-time chaotic-map TRNGs, in principle, are capable of generating unbiased and uncorrelated random bits, implementation variations deteriorate the quality of the output sequence as a result of variation of the chaotic map parameters (which result in a non-ideal map). In this paper, we introduce an analytical technique to investigate the impact of process variations on the randomness of the output sequence generated using tent map-based discrete-time chaotic map truly random number generators (TRNGs). We validate our results against the probability density function (pdf) estimated using extensive Monte-Carlo simulations applied to the non-ideal map characteristics. The simulation results suggest that the estimation of pdf using our simplified theoretical method is in good agreement with that of the Monte-Carlo simulations. Finally, the quality of the random bits have also been evaluated using the entropy measure.