Wayne Yamamoto
University of California, Santa Barbara
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Featured researches published by Wayne Yamamoto.
IEEE Software | 1991
John P. J. Kelly; Thomas I. McVittie; Wayne Yamamoto
The software faults that are particularly significant in a real-time concurrent system are identified, and the use of design diversity to prevent their occurrence is examined. Two approaches to enforced diversity, recovery-block software and multiversion software, are discussed. The recovery-block scheme combines N diverse software versions arranged (conceptually, at least) in sequential order, although the versions may also be organized to execute concurrently. The multiversion-software approach excuses all N versions in parallel, taking advantage of the redundant processors likely to be available in any system that must tolerate hardware and software faults. Although different, both approaches require sufficiently diverse development environments and that faults in the specification do not lead to similar errors.<<ETX>>
hawaii international conference on system sciences | 1994
Wayne Yamamoto; Mauricio J. Serrano; Adam R. Talcott; Roger C. Wood; M. Nemirosky
Multistreamed processors can significantly improve processor throughput by allowing interleaved execution of instructions from multiple instruction streams. We present an analytical modeling technique to evaluate the effect of dynamically interleaving additional instruction streams within superscalar architectures. Using this technique, estimates of the instructions executed per cycle (IPC) for a processor architecture are quickly calculated given simple descriptions of the workload and hardware characteristics. To validate this technique, estimates of the SPEC89 benchmark suite obtained from the model are compared to results from a hardware simulator. Our results show that the technique produces accurate estimates with an average deviation of /spl sim/4% from the simulation results. Finally, we demonstrate that as the number of functional units increases, multistreaming is an effective technique to exploit these additional resources.<<ETX>>
international symposium on computer architecture | 1994
Adam R. Talcott; Wayne Yamamoto; Mauricio J. Serrano; Roger C. Wood; Mario Nemirovsky
In this paper, we examine the benefits of the early resolution of branch instructions and the impact of unresolved branches on history-based branch prediction schemes by using two new metrics that are more revealing than branch prediction accuracy alone. We first briefly review a number of branch prediction schemes and introduce two new branch prediction scheme performance metrics. We then utilize these metrics to gauge the improvement in branch prediction scheme performance when only the outcomes of unresolved branches are predicted. Finally, we examine two approaches for handling multiple unresolved branches in history-based branch prediction schemes, and determine that prediction accuracy remains quite stable when older branch histories are used.
Proceedings of the 7th international conference on Computer performance evaluation : modelling techniques and tools: modelling techniques and tools | 1994
Mauricio J. Serrano; Wayne Yamamoto; Roger C. Wood; Mario Nemirovsky
The current trend is integrating more hardware functional units within the superscalar processor. However, the functional units are not fully utilized due to the inherent limit of instruction-level parallelism in a single instruction stream. The use of simultaneous execution of instructions from multiple streams, referred to as multistreaming, can increase the number of instructions dispatched per cycle by providing more ready-to-issue instructions. We present an analytical modeling technique to evaluate the effect of dynamically interleaving additional instruction streams within superscalar architectures. Estimates of the instructions executed per cycle (IPC) are calculated given simple descriptions of the workload and hardware. To validate this technique, estimates obtained from the model for several benchmarks are compared against results from a hardware simulator.
Archive | 1992
Thomas I. McVittie; John P. J. Kelly; Wayne Yamamoto
Formal specification languages are increasingly being employed as an aid in the design and implementation of highly reliable systems. Recent experimental evidence indicates that the syntax and semantics associated with a formal specification language can have a large effect on the subsequent program version. This paper analyses the effect formal specification languages have on program development by examining nine diverse versions of a communication protocol created using three different formal specification languages.
international conference on parallel architectures and compilation techniques | 1995
Wayne Yamamoto; Mario D. Nemirovsky
Archive | 2002
Sudarshan Kadambi; Adam R. Talcott; Wayne Yamamoto
Archive | 1996
Wayne Yamamoto
Archive | 1998
Mario Nemirovsky; Wayne Yamamoto
Archive | 2003
Sudarshan Kadambi; Vijay Balakrishnan; Wayne Yamamoto