Weiqian Liang

Design of Speech Recognition Co-Processor for the Embedded Implementation

This paper presents the design of high performance co-processor - MSAC (multiplier square accumulate calculation) co-processor for the embedded speech recognition of CHMM (Continuous Hidden Markov Model) with the dedicated hardware of Mahalanobis distance algorithm to finish the most computation intensive operations in the speech recognition flow. The co-processor could be used both off-chip controlled by MCU and on-chip as an IP core for IP based SOC design. The proposed MSAC co-processor has been designed and implemented in ASIC cell-based approach using 0.18 um UMC technology. By using this co-processor, the clock of systems main processor, such as ARM7, could be down to as low as 20 MHz to meet the real-time requirement for embedded speech recognition, and the die size is 1.7 x 1.7 mm2 (including 4 K Words SRAM), thus to reduce the power consumption and the cost significantly.

Design of speech recognition co-processor with fast gaussian likelihood computation

This paper presents the design of high performance co-processor used to calculate the posterior probabilities for the embedded speech recognition of CHMM (Continuous Hidden Markov Model) with the MPIE (Maximum Probability Increase Estimation) algorithm to finish the most computation intensive operations in the speech recognition flow. The design of the co-processor is verified on Xilinx FPGA platform with ARM as MCU.

Efficiency improvements for a speech recognition coprocessor

This paper proposes a revised MSAC (Multiplier Square Accumulate Calculation) coprocessor called VPU3010, which is used to calculate Mahalanobis distance for ASR (Automatic Speech Recognition). We improved the address generating unit to provide frame-increment and resetting function, and appended feedback signal as an output port, which could be used as interrupt trigger or query signal by the main processor. Design of VPU3010 was verified on Xilinx FPGA platform firstly, then has been implemented on 0.18µm UMC technology. Experiments show that the real-time factor of system based on VPU3010 working at 50MHz is 0.72 compared with 0.82 of MSAC at 50MHz, which could significantly improve the efficiency of the C-Program calling the coprocessor.