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Archive | 1991

Three-dimensional semiconductor structures formed from planar layers

Wilber D. Pricer; Thomas B. Faure; Bernard S. Meyerson; William John Nestork; John R. Turnbull


Archive | 1975

Process for fabricating devices having dielectric isolation utilizing anodic treatment and selective oxidation

Ingrid E. Magdo; Steven Magdo; William John Nestork


Archive | 1974

DC testing of integrated circuits and a novel integrated circuit structure to facilitate such testing

Larry Ernest Freed; William John Nestork; Daniel Tuman


Archive | 1984

Personalizable masterslice substrate for semiconductor chips

William E. Dougherty; Stuart Eugene Greer; William John Nestork; William Tilden Norris


Archive | 1987

Power distribution for full wafer package

Hans E. Dietsch; William John Nestork


Archive | 1982

SUBSTRATE FOR SEMICONDUCTOR CHIPS

William E. Dougherty; Stuart Eugene Greer; William John Nestork; William Tilden Norris


Archive | 1990

Dreidimensionale Halbleiterstrukturen geformt aus ebenen Schichten. Three-dimensional semiconductor structures formed of planar layers.

Wilbur D. Pricer; Thomas B. Faure; Bernard S. Meyerson; John R. Turnbull; William John Nestork


Archive | 1988

Integrierte Schaltungspackung. The integrated circuit package.

Hans E. Dietsch; William John Nestork


Archive | 1976

Verfahren zur herstellung dielektrisch isolierter halbleiterbereiche Method for manufacturing semiconductor dielectrically isolated areas

Ingrid E. Magdo; Steven Magdo; William John Nestork


Archive | 1976

A process for producing dielectrically isolated semiconductor regions

Ingrid E. Magdo; Steven Magdo; William John Nestork

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