Won Namgoong

A channelized digital ultrawideband receiver

A channelized digital ultrawideband (UWB) receiver that efficiently samples the UWB signal at a fraction of the chip frequency is proposed. The received signal is channelized in the frequency domain by employing a bank of mixers and low-pass filters. After sampling at a much reduced frequency, digital synthesis filters optimally estimate the transmitted signals. The signal-to-noise ratio (SNR) of the proposed receiver has been solved and compared against an ideal conventional receiver, which is defined as a receiver that samples at the signal Nyquist rate. When finite resolution analog-to-digital converters (ADC) are employed in the presence of a large narrowband interferer, the proposed receiver significantly outperforms the ideal conventional receiver. For example, the SNR of the proposed receiver is as much as 20 dB higher than the ideal conventional receiver when a 4-bit ADC is used in the presence of a 50 dB (relative to the noise floor) brickwall narrowband interferer with a bandwidth of 15% of the chip frequency.

Direct-conversion RF receiver design

The direct-conversion radio-frequency receiver architecture promises superior performances in power, size, and cost over existing superheterodyne-based receivers. The use of direct-conversion receiver (DCR) architecture, however, has been limited due to two well-known problems, namely, the 1/f noise and the direct-current offset noise, to which conventional architectures are less sensitive. This paper analyzes these noise effects on reception performance of a DCR with alternating-current (ac) coupling filter in the receive path. A mathematical treatment of the performance of a DCR is provided. A performance bound of a DCR given its 1/f noise roll-off frequency and ac-coupling filter cut-off frequency is first obtained using vector coding. Then, the performance of a more practical adaptive reception method using a linear equalizer is discussed. Adaptability is especially important in rapidly time-varying channels such as in the wireless environment. The linear equalizer is effective at signal-to-noise ratios (SNRs) below 9 dB, but its performance degrades significantly at larger SNR. To achieve high performance at large SNR (>9 dB), a spectrum shaping method using line codes for direct-conversion reception is proposed. This method achieves near-optimum direct-conversion reception at high SNR while maintaining low complexity and adaptability at the receiver.

A high-efficiency variable-voltage CMOS dynamic dc-dc switching regulator

Dynamically adjusting supply voltage based on processing load in applications that involve variable workloads to reduce energy consumption has been proposed. A similar idea for tracking temperature and process variations using a dynamic switching regulator has also been proposed. In this paper a buck-converter switching regulator chip for use in an energy-on-demand system is shown.

Ultra-wideband radio

The application of ultra-wideband (UWB) technology to low-cost short-range communications presents unique challenges to the communications engineer. The impact of the US FCCs regulations and the characteristics of the low-power UWB propagation channels are explored, and their effects on UWB hardware design are illustrated. This tutorial introduction includes references to more detailed explorations of the subject.

An oversampled channelized UWB receiver with transmitted reference modulation

To digitize the ultra-wideband (UWB) signal at its Nyquist rate, a frequency channelized receiver for UWB radio based on hybrid filter banks (HFB) is presented. Among the challenges of such receivers are the uncertainties of the analog analysis filters and the slow convergence speed. To overcome these problems, a channelized receiver operating at slightly above the critically sampling rate is presented. The proposed receiver, which is designed for use in transmitted reference (TR) systems, combines the synthesis filters and the matched filter so that the joint response of the analysis filter and the propagation channel can be estimated independently in each subband. When the input noise is colored or a narrowband interference (NBI) is present, the weighting in each subband can be adaptively adjusted so to approximate the noise whitening and matched filtering operation for near optimal detection. The adaptive performance of the proposed receiver is slightly better than an ideal full-band receiver when the input noise is white and significantly better when a NBI is present. The effect of the automatic gain controller (AGC) and the analog-to-digital converter (ADC) are also considered. The proposed receiver with 3-bit ADC seems sufficient to achieve performance comparable to an infinite bit channelized receiver even in the presence of large NBI

A Non-Iterative Technique for Phase Noise ICI Mitigation in Packet-Based OFDM Systems

A practical approach for detecting packet-based orthogonal-frequency-division multiplexing (OFDM) signals in the presence of phase noise is presented. An OFDM packet consists of several OFDM symbols with full-pilot symbols at the beginning followed by consecutive data symbols. Based on the full-pilot OFDM symbol, a frequency-domain joint phase noise and channel vector estimator is first derived. It is shown that the phase noise vector can be estimated by maximizing a constrained quadratic form without requiring knowledge of the channel vector. This estimated phase noise vector is then used to compute the least squares channel estimator. Assuming that the channel is constant during each packet, the estimated channel is used in subsequent data OFDM symbols for equalization and data detection. Since phase noise changes from one OFDM symbol to the next, the scattered pilots in each data OFDM symbol are used to non-iteratively estimate and mitigate the phase noise induced interference. A significant improvement in the signal-to-interference-plus-noise ratio is achieved using the proposed algorithm.

On the Performance of OFDM-Based Amplify-and-Forward Relay Networks in the Presence of Phase Noise

We investigate the performance of orthogonal frequency division multiplexing (OFDM)-based dual-hop amplify-and-forward (AF) relay networks in the presence of phase noise (PHN). We show that the use of an AF relay may not be beneficial compared to a direct transmission in the presence of PHN. Using outage probability analysis, an upper bound on the allowable PHN level is derived which ensures that the dual-hop outperforms the direct transmission. To improve dual-hop transmission performance in the presence of PHN, we propose a reduced-complexity joint channel and PHN estimator using full-pilot OFDM symbols for AF relay transmission. The proposed approach achieves a lower mean squared error compared to the conventional channel estimator. In addition, we derive a joint data detection and PHN estimation scheme for comb-type data OFDM symbols by modifying the maximum ratio combining metric to account for the effect of PHN at the destination node.

Modeling and analysis of nonlinearities and mismatches in AC-coupled direct-conversion receiver

This paper analyzes the effects of circuit nonlinearities and mismatches on the performance of an AC-coupled direct-conversion receiver (DCR). An analytical solution is necessary, since quantifying the DCR performance by simulation can be prohibitively slow. Our analysis approach first transforms the receiver front end to an equivalent baseband continuous-time receiver model with all of the noise sources referred to just before the sampler. Accurate approximations were made throughout this process to make the analysis tractable. The baseband continuous-time model can be further simplified and combined with the baseband equivalent propagation channel model. The resulting model allows the end-to-end performance of an ac-coupled DCR to be quickly and accurately quantified.

High-Speed Single-Ended Parallel Link Based on Three-Level Differential Encoding

An encoding scheme for high-speed single-ended parallel transceiver system is presented. Compared to the 50% I/O pin utilization of the conventional differential encoding, the proposed system employs 3-level differential coding to increase the utilization to 75% and 93% using a group of four and six conductors, respectively. The proposed coding scheme also reduces the effects of inter-symbol interference (ISI), removes reference ambiguity, and reduces power line fluctuations at the transmitter side. Using simple encoder/decoder, the proposed scheme enables multiple drivers at the transmitter to recycle the same current, reducing power consumption. To validate the proposed system, a parallel link was designed in 0.18 mum CMOS process. The chip implements the coding algorithm over four conductors and achieves a data rate of 4.2 Gb/s/pin while dissipating 17.1 mW/Gb/s.

A channelized DSSS ultra-wideband receiver

Critical to the design of a digital ultra-wideband (UWB) receiver is the ability for the analog-to-digital converter (ADC) to efficiently sample and digitize the UWB signal of several gigahertz. Designing a single ADC to operate at such frequencies is impractical, and parallel ADC architectures with each ADC operating at a fraction of the effective sampling frequency need to be devised. A parallel receiver architecture that efficiently samples and processes the UWB signal at a fraction of the chip frequency is proposed. The received signal is channelized in the frequency domain by employing a bank of mixers and lowpass filters. After sampling at a much reduced frequency, digital filters then operate directly on the sampled signals in each subband channel to optimally estimate multiple spread codes in parallel.