Won Sang Lee

Si3N4 Double Passivation Methods for Optimizing the DC Properties in a Gamma-Gate AlGaN/GaN HEMT Using Plasma Enhanced Chemical Vapor Deposition

Double passivation layers, Si3N4 on Si3N4 (Si3N4 / Si3N4), have been implemented onto the top and bottom surface passivation film layers for a gamma-gate AlGaN/GaN HEMT using Plasma Enhanced Chemical Vapor Deposition (PECVD). The effects of the reduced current collapse electro characteristics were then compared to devices using double passivation as SiO2 on SiO2 (SiO2 / SiO2). Both samples were tested under the same conditions: Vds = 0 to 15 V and Vgs = 1 to -5 V. The Si3N4 / Si3N4 passivation results show a maximum saturation current density (Ids max) of 761 mA/mm, a peak extrinsic trans conductance (gm max) of 200 mS/mm, and threshold voltages of (Vth) -4.5 V, which increases up to 18% and 5% than those of SiO2/SiO2 double passivation.

A Novel Silicon-Based Packaging Platform for High-Efficiency LED Modules

A novel silicon-based packaging platform with the electroplated-based reflector and the electrode- guided interconnections is developed for the packaging component of a high-luminosity and high-efficiency multi-chip light-emitting diode (LED) module, which is patterned on a new type of insulating layer that consists of nanoporous anodized aluminum oxide (AAO) layer and plasma- enhanced chemical vapor deposition (PECVD) deposited silicon dioxide (SiO2) on a doped silicon substrate. The reflector and the electrical interconnections are successfully fabricated by using the electroplating method in the same body. In order to obtain the benefits of high efficiency LED modules, the requirements concerning thermal management and photomechanical layout have to be met. In this paper, we will discuss a novel fabrication method in LED module packaging platform, and then describe the thin layer of electroplated Cu/Ni/Au in order to reduce thermal resistance and to increase thermal diffusion efficiency. The heat generated by the LED chips is dissipated directly to the silicon body through the metal-plated platform, and truly excellent heat dissipation characteristics are observed. We demonstrate 987 lm 8 W-level cool-white light (5000 K, 16 V, 110 lm/W, CRI = 77) emission for 570 µm × 230 µm-chip LEDs at 600 mA operation.

Recessed gate GaN MESFETs fabricated by the photoelectrochemical etching process

A new photo-electrochemical etching method was developed and used to fabricate GaN MESFETs. The etching process uses photoresist for masking illumination and the etchant is KOH based. The etching rate with 1.0 mol% of KOH for n-GaN is as high as 1600 A/min under the Hg illumination of 35 mW/cm/ 2 . The MESFET saturates at V DS = 4 V and pinches off at V GS = −3 V. The maximum drain current of the device is 230 mA/mmn at 300 K and the value is remained almost same for 500 K operation. The characteristic frequencies, f T and f max , are 6.35 GHz and 10.25 GHz, respectively. Insensitivity of the device performance to temperature was attributed to the defect-related high activation energy of dopants for ionization and band-bending at the subgrain boundaries in GaN thin films.

Cost-effective high-yield manufacturing process of integrated passive devices (IPDs) for RF and microwave application

A novel fabrication process has been demonstrated to create cost-effective, high-yield, and high-quality integrated passive devices (IPDs) on GaAs substrate. Various materials and processing approaches to thin film resistors (TFRs), spiral inductors, and metal-insulator-metal (MIM) capacitors have been evaluated in terms of cost, yield, and device performance. To further reduce the total cost, SU-8 photo resist (PR) is firstly presented as a novel material for forming the final passivation layer. A digital cellular system (DCS) power divider is realized by this novel process and shows very good RF performances with the high yield and low cost in spite of its small chip size.