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Dive into the research topics where Xiao Y. Wang is active.

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Featured researches published by Xiao Y. Wang.


IEEE Transactions on Circuits and Systems | 2011

A Low Power Impulse Radio Design for Body-Area-Networks

Rajeev K. Dokania; Xiao Y. Wang; Siddharth Tallur; Alyssa B. Apsel

This paper presents a low power radio design tailored to the short distance, low data rate application of body area networks. In our analysis we consider a comparison between traditional continuous wave radios and ultra wide band impulse radios for this application space. We analyze the energy/bit requirement for each of the architectures and discuss how a duty-cycled radio is better suited to low data rate applications due to practical design considerations. As a proof-of-concept we present the design and measured results of a duty-cycled, noncoherent impulse radio transceiver. The designed transceiver was measured to consume only 19 μW at a data-rate of 100 kbps. The design gives a BER of 10-5 and works for a range of 2.5 m at an average Rx-sensitivity of -81 dBm. The designed transceiver enables both OOK and BPSK schemes and can be configured to use a pseudocoherent self-correlated signature detection and generation mechanism. This added functionality helps distinguish different types of pulses such as timing and data-pulses in real time. The transceiver was designed in a 90 nm CMOS process and occupies 2.3 mm2 area.


IEEE Sensors Journal | 2011

PCO-Based Synchronization for Cognitive Duty-Cycled Impulse Radio Sensor Networks

Xiao Y. Wang; Rajeev K. Dokania; Alyssa B. Apsel

The pulse coupled oscillator (PCO) system of Mirollo and Strogatz has been proposed as a robust, scalable synchronization scheme for impulse radio (IR-UWB) networks. In this paper, we map the parameter space for physical implementation of CMOS IR-UWB PCO radios into the traditional PCO mathematical model and show through comprehensive simulation that high-quality synchronization is easily achieved. We discuss practical implementation issues of PCOs for these radios and show that such systems can be created with extremely low cost and low complexity integrated components with acceptable synchronization performance. Finally, we demonstrate simple wireless synchronization of PCOs, and show that synchronization of such systems is robust in CMOS electronics.


midwest symposium on circuits and systems | 2007

Pulse coupled oscillator synchronization for low power UWB wireless transceivers

Xiao Y. Wang; Alyssa B. Apsel

Achieving robust synchronization in low power UWB systems remains a dominant obstacle in the design of these systems. In this paper, we propose using the pulse coupled oscillator (PCO) phenomenon with system feedback as an alternative scheme to conventional master-slave synchronization using power hungry PLL or DLL circuits. Sensor network nodes implementing the PCO state function are mathematically guaranteed to converge towards phase lock, with no need for a PLL, off chip crystal, or continuously operating low noise amplifier. To date, we know of no circuit-level implementation of a PCO based wireless transceiver. We also demonstrate synchronization of a switchable integrated transceiver front-end in the IBM CMOS7RF process, a key first step in design of short-range communications for microwatt power levels.


IEEE Transactions on Circuits and Systems I-regular Papers | 2013

A Crystal-Less Self-Synchronized Bit-Level Duty-Cycled IR-UWB Transceiver System

Xiao Y. Wang; Rajeev K. Dokania; Alyssa B. Apsel

A self-synchronized dual-band OOK IR-UWB transceiver system for short-range, low-data rate sensor networks is demonstrated. The transceiver system utilizes asynchronous non-coherent energy detection coupled with a novel pulse-coupled injection-locking scheme to synchronize transceivers throughout the network at nanosecond-scale precision. The pulse-coupled synchronization scheme compensates for intrinsic frequency variation so that all timing in the system can be derived from an integrated relaxation oscillator operating at a nominal frequency of 150 KHz. A low-jitter PLL and simple combinational logic is used for timing generation and control. The system is duty cycled between the expected arrival times of the sync and data pulses, allowing a demonstrated average RF duty cycle of less than 1% while being able to maintain synchronization for nearly 1 million cycles. Total measured system power consumption is 119 μW while actively communicating with 1200 bit packets. The transceiver was designed in a 90 nm IBM CMOS process and occupies 1.7 mm2 of active area.


international symposium on circuits and systems | 2009

Ultra-low power radios for ad-hoc networks

Alyssa B. Apsel; Rajeev K. Dokania; Xiao Y. Wang

In this paper, we present the design of an ultra-low power impulse radio for an ad-hoc sensor network. This radio is designed to meet the 802.15.4a standard for UWB impulse radio while achieving low power operation by aggressively duty cycling both the transmitter and receiver with nearly the same “on-time”. The key advance that enables aggressive receiver duty cycling is a new approach to establishing a robust, low jitter global network clock using a pulse coupled oscillator (PCO) algorithm. In this paper we describe how PCO based synchronization is used to design a radio transceiver capable of balanced two way communication and ad-hoc networking for under 30uW average power in continuous operation.


IEEE Transactions on Biomedical Circuits and Systems | 2016

A Wireless FSCV Monitoring IC With Analog Background Subtraction and UWB Telemetry

Carlos I. Dorta-Quinones; Xiao Y. Wang; Rajeev K. Dokania; Alycia Gailey; Manfred Lindau; Alyssa B. Apsel

A 30- μW wireless fast-scan cyclic voltammetry monitoring integrated circuit for ultra-wideband (UWB) transmission of dopamine release events in freely-behaving small animals is presented. On-chip integration of analog background subtraction and UWB telemetry yields a 32-fold increase in resolution versus standard Nyquist-rate conversion alone, near a four-fold decrease in the volume of uplink data versus single-bit, third-order, delta-sigma modulation, and more than a 20-fold reduction in transmit power versus narrowband transmission for low data rates. The 1.5- mm2 chip, which was fabricated in 65-nm CMOS technology, consists of a low-noise potentiostat frontend, a two-step analog-to-digital converter (ADC), and an impulse-radio UWB transmitter (TX). The duty-cycled frontend and ADC/UWB-TX blocks draw 4 μA and 15 μA from 3-V and 1.2-V supplies, respectively. The chip achieves an input-referred current noise of 92 pArms and an input current range of ±430 nA at a conversion rate of 10 kHz. The packaged device operates from a 3-V coin-cell battery, measures 4.7 × 1.9 cm2, weighs 4.3 g (including the battery and antenna), and can be carried by small animals. The system was validated by wirelessly recording flow-injection of dopamine with concentrations in the range of 250 nM to 1 μM with a carbon-fiber microelectrode (CFM) using 300-V/s FSCV.


radio frequency integrated circuits symposium | 2011

A self-synchronized, crystal-less, 86µW, dual-band impulse radio for ad-hoc wireless networks

Xiao Y. Wang; Rajeev K. Dokania; Yi Zhuang; Waclaw Godycki; Carlos I. Dorta-Quinones; Michael J. Lyons; Alyssa B. Apsel

An 86µW, 150Kbps, self synchronizing 3.5–4.5GHz UWB IR transceiver is presented. Synchronous receiver duty cycling of 0.5% is enabled without a crystal through a pulse coupled oscillator (PCO) network that establishes timing and allows multi-node multi-hop communication. The synchronization scheme is supported by implementation of low power oscillator and timing circuits to control duty-cycling. Our FCC compliant transceiver uses OOK modulation and has a receiver sensitivity of −86dBm.


international symposium on low power electronics and design | 2010

A 6μw, 100kbps, 3-5ghz, UWB impulse radio transmitter

Rajeev K. Dokania; Xiao Y. Wang; Carlos I. Dorta-Quinones; Waclaw Godycki; Siddharth Tallur; Alyssa B. Apsel

In this paper we present the design and the measured results for a FCC-compliant UWB impulse transmitter (Tx) designed to operate in the 3–5GHz range. The transmitter uses a fast start-up, duty-cycled, current-starved ring-oscillator topology. A triangular pulse-shaping technique is utilized for spectrum-shaping to facilitate FCC compliance. The designed transmitter can be controlled to operate in 3-different bands centered at 3.5GHz, 4.0GHz, and 4.5GHz, with good inter-band isolation. The chip was fabricated in a 90nm CMOS technology, and was measured to consume only 2.8µW of leakage power and 2.9 µW at 100Kbps of dynamic power. The data-rate can be scaled up to 5Mbps at 29pJ/pulse, while still staying compliant with FCC-mask even with non-random pulsing. The output voltage swing was measured to be ~450–500mV across a 50Q load. The total power consumption of ~6µW at 100Kbps is an order of magnitude better than that of state-of-the-art designs, i.e. ~100µW, operating at same pulse rate.


international symposium on circuits and systems | 2009

Implementation of a global clocking scheme for ULP radio networks

Xiao Y. Wang; Rajeev K. Dokania; Alyssa B. Apsel

In this paper we demonstrate the first 3-node synchronization of on-chip CMOS impulse radios. The synchronization scheme presented here is fast, scalable, low jitter and facilitates aggressive duty-cycling. We show experimentally that in steady state, the nodes are synchronized with cycle-to-cycle jitter of 1% of the period.


global communications conference | 2010

PCO Based Event Propagation Scheme for Globally Synchronized Sensor Networks

Rajeev K. Dokania; Xiao Y. Wang; Waclaw Godycki; Carlos I. Dorta-Quinones; Alyssa B. Apsel

Impulse Radios within communication networks using Pulse Coupled Oscillator (PCO) global synchronization can be efficiently duty cycled for significant power savings. In this paper we utilize the emergent dynamical behavior in the PCO network to enable a simple event communication scheme particular to this type of network. In this scheme, each coupled radio node accesses the channel by simply changing its pulse repetition frequency in response to an event sensed by its sensor. This forces the network to a new, higher operating frequency, which can be locally measured at every node in the network to communicate occurrence of an event in the network. In this paper we show how this synchronization occurs and how it is ideally suited for low power operation. The proposed event propagation scheme enables a node to broadcast information about an event to an entire network in a simple fashion without the need of any data-packet formation or complex MAC/Routing protocols. We show that resynchronization and recovery of the network happens almost immediately. The latency involved corresponds to the distance-delay (due to finite speed of light) plus a very small circuit delay of (4-5ns) per hop related to detection of impulses.

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Alycia Gailey

Arizona State University

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