Xiaobo Sharon Hu

Task scheduling and voltage selection for energy minimization

In this paper, we present a two-phase framework that integrates task assignment, ordering and voltage selection (VS) together to minimize energy consumption of real-time dependent tasks executing on a given number of variable voltage processors. Task assignment and ordering in the first phase strive to maximize the opportunities that can be exploited for lowering voltage levels during the second phase, i.e., voltage selection. In the second phase, we formulate the VS problem as an Integer Programming (IP) problem and solve the IP efficiently. Experimental results demonstrate that our framework is very effective in executing tasks at lower voltage levels under different system configurations.

On-Chip Clocking for Nanomagnet Logic Devices

We report local control of nanomagnets that can be arranged to perform computation in a cellular automata-like architecture. This letter represents the first demonstration of deterministically placed quantum-dot cellular automata (QCA) devices (of any implementation), where devices are controlled by on-chip local fields.

Enhanced fixed-priority scheduling with (m,k)-firm guarantee

Studies the problem of scheduling task sets with (m,k) constraints. In our approach, jobs of each task are partitioned into two sets: mandatory and optional. Mandatory jobs are scheduled according to their pre-defined priorities, while optional jobs are assigned to the lowest priority. We show that finding the optimal partition as well as determining the schedulability of the resultant task set are both NP-hard problems. A new technique, based on the general Chinese remainder theorem, is proposed to quantify the interference among tasks, which is then used to derive two partitioning approaches. Furthermore, a sufficient condition is presented to predict, in polynomial time, the schedulability of mandatory jobs. We prove that our partitions are never worse than those obtained in previous work. Experimental results also show significant improvement achieved by our approaches.

Clocking structures and power analysis for nanomagnet-based logic devices

Logical devices made from nano-scale magnets have many potential advantages - systems should be non-volatile, dense, low power, radiation hard, and could have a natural interface to MRAM. Initial work includes experimental demonstrations of logic gates and wires and theoretical studies that consider their power dissipation. This paper looks at power dissipation too, but also considers the circuitry needed to drive a computation. Initial results are very encouraging and indicate that clocked magnetic logic could - in the worst case - match equivalent low power CMOS circuits and - in the best-case - potentially provide more than 2 orders of magnitude improvement when one considers energy per operation.

Minimal energy fixed-priority scheduling for variable voltage processors

To fully exploit the benefit of variable voltage processors,voltage schedules must be designed in the context of workload requirement. In this paper, we present an approach tofinding the least-energy voltage schedule for executing real-timejobs on such a processor according to a fixed priority,preemptive policy. The significance of our approach is thatthe theoretical limit in terms of energy saving for such systemsis established, which can thus serve as the standard toevaluate the performance of various heuristic approaches.Two algorithms for deriving the optimal voltage scheduleare provided. The first one explores fundamental propertiesof voltage schedules while the second one builds on the firstone to further reduce the computational cost. Experimentalresults are shown to compare the results of this paper withprevious ones.

A realistic variable voltage scheduling model for real-time applications

Voltage scheduling is indispensable for exploiting the benefit of variable voltage processors. Though extensive research has been done in this area, current processor limitations such as transition overhead and voltage level discretization are often considered insignificant and are typically ignored. We show that for hard, real-time applications, disregarding such details can lead to sub-optimal or even invalid results. We propose two algorithms that guarantee valid solutions. The first is a greedy yet simple approach, while the second is more complex but significantly reduces energy consumption under certain conditions. Through experimental results on both real and randomly generated systems, we show the effectiveness of both algorithms, and explore what conditions make it beneficial to use the complex algorithm over the basic one.

Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs

Increasing integrated circuit (IC) power densities and temperatures may hamper multiprocessor system-on-chip (MPSoC) use in hard real-time systems. This paper formalizes the temperature-aware real-time MPSoC assignment and scheduling problem and presents an optimal phased steady-state mixed integer linear programming-based solution that considers the impact of scheduling and assignment decisions on MPSoC thermal profiles to directly minimize the chip peak temperature. We also introduce a flexible heuristic framework for task assignment and scheduling that permits system designers to trade off accuracy for running time when solving large problem instances. Finally, for task sets with sufficient slack, we show that inserting idle times between task executions can further reduce the peak temperature of the MPSoC quite significantly.

On self-triggered full-information H-infinity controllers

A self-triggered control task is one in which the task determines its next release time. It has been conjectured that self-triggering can relax the requirements on a real-time scheduler while maintaining application (i.e. control system) performance. This paper presents preliminary results supporting that conjecture for a self-triggered real-time system implementing full-information H∞ controllers. Release times are selected to enforce upper bounds on the induced L2 gain of a linear feedback control system. These release times are treated as requests by the system scheduler, which then assigns actual release times using Buttazzos elastic scheduling algorithm. Preliminary experimental results from a Matlab stateflow simulink model demonstrated a remarkable robustness to scheduling delays induced by real-time schedulers. These results show that self-triggered controllers are indeed able to maintain acceptable levels of application performance during prolonged periods of processor overloading.

Minimum energy fixed-priority scheduling for variable voltage processors

To fully exploit the benefit of variable voltage processors, voltage schedules must be designed in the context of work load requirement. In this paper, we present an approach to finding the least-energy voltage schedule for executing real-time jobs on such a processor according to a fixed priority, preemptive policy. The significance of our approach is that the theoretical limit in terms of energy saving for such systems is established, which can thus serve as the standard to evaluate the performance of various heuristic approaches. Two algorithms for deriving the optimal voltage schedule are provided. The first one explores fundamental properties of voltage schedules while the second one builds on the first one to further reduce the computational cost. Experimental results are shown to compare the results of this paper with previous ones.

Shape Engineering for Controlled Switching With Nanomagnet Logic

We demonstrate that in circuits and systems that comprised of nanoscale magnets, magnet-shape-dependent switching properties can be used to perform Boolean logic. More specifically, by making magnets with slanted edges, we can shift the energy barrier of the device (i.e., so that it is not at a maximum when a device is magnetized along its geometrically hard axis). In clocked systems, we can leverage this barrier shift to make and or or gates that are not majority based. Advantages include reduced gate footprint and interconnect overhead as we eliminate one gate input. In this paper, we report and discuss micromagnetic simulations that illustrate how magnet shape can facilitate nonmajority-gate-based, reduced footprint logic; preliminary fabrication and testing results that illustrate that shape engineering can induce energy barrier shifts; and additional micromagnetic simulations that show other ways in which we might leverage shape in circuits made from nanoscale magnets.