yang Xiao

Three-Dimensional Flexible Complementary Metal–Oxide–Semiconductor Logic Circuits Based On Two-Layer Stacks of Single-Walled Carbon Nanotube Networks

We have proposed and fabricated stable and repeatable, flexible, single-walled carbon nanotube (SWCNT) thin film transistor (TFT) complementary metal-oxide-semiconductor (CMOS) integrated circuits based on a three-dimensional (3D) structure. Two layers of SWCNT-TFT devices were stacked, where one layer served as n-type devices and the other one served as p-type devices. On the basis of this method, it is able to save at least half of the area required to construct an inverter and make large-scale and high-density integrated CMOS circuits easier to design and manufacture. The 3D flexible CMOS inverter gain can be as high as 40, and the total noise margin is more than 95%. Moreover, the input and output voltage of the inverter are exactly matched for cascading. 3D flexible CMOS NOR, NAND logic gates, and 15-stage ring oscillators were fabricated on PI substrates with high performance as well. Stable electrical properties of these circuits can be obtained with bending radii as small as 3.16 mm, which shows that such a 3D structure is a reliable architecture and suitable for carbon nanotube electrical applications in complex flexible and wearable electronic devices.

SWCNT‐MoS2‐SWCNT Vertical Point Heterostructures

A vertical point heterostructure (VPH) is constructed by sandwiching a two-dimensional (2D) MoS2 flake with two cross-stacked metallic single-walled carbon nanotubes. It can be used as a field-effect transistor with high on/off ratio and a light detector with high spatial resolution. Moreover, the hybrid 1D-2D-1D VPHs open up new possibilities for nanoelectronics and nano-optoelectronics.

Study of Carbon Nanotubes as Etching Masks and Related Applications in the Surface Modification of GaAs-based Light-Emitting Diodes

The surface modification of LEDs based on GaAs is realized by super-aligned multiwalled carbon nanotube (SACNT) networks as etching masks. The surface morphology of SACNT networks is transferred to the GaAs. It is found that the light output power of LEDs based on GaAs with a nanostructured surface morphology is greatly enhanced with the electrical power unchanged.

Highly Sensitive, Uniform, and Reproducible Surface-Enhanced Raman Spectroscopy Substrate with Nanometer-Scale Quasi-periodic Nanostructures

We introduce a simple and cost-effective approach for fabrication of effective surface-enhanced Raman spectroscopy (SERS) substrates. It is shown that the as-fabricated substrates show excellent SERS effects in various probe molecules with high sensitivity, that is, picomolar level detection, and also good reliability. With a SERS enhancement factor beyond 108 and excellent reproducibility (deviation less than 5%) of signal intensity, the fabrication of the SERS substrate is realized on a four-inch wafer and proven to be effective in pesticide residue detection. The SERS substrate is realized first through the fabrication of quasi-periodic nanostructured silicon with dimension features in tens of nanometers using superaligned carbon nanotubes networks as an etching mask, after which a large amount of hot spots with nanometer gaps are formed through deposition of a gold film. With rigorous nanostructure design, the enhanced performance of electromagnetic field distribution for nanostructures is optimized. With the advantage of cost-effective large-area preparation, it is believed that the as-fabricated SERS substrate could be used in a wide variety of actual applications where detection of trace amounts is necessary.

Low-energy transmission electron diffraction and imaging of large-area graphene

Crystalline characterization of large-area graphene and study of adsorbates on it can be realized with low-energy electron beam. Two-dimensional (2D) materials have attracted interest because of their excellent properties and potential applications. A key step in realizing industrial applications is to synthesize wafer-scale single-crystal samples. Until now, single-crystal samples, such as graphene domains up to the centimeter scale, have been synthesized. However, a new challenge is to efficiently characterize large-area samples. Currently, the crystalline characterization of these samples still relies on selected-area electron diffraction (SAED) or low-energy electron diffraction (LEED), which is more suitable for characterizing very small local regions. This paper presents a highly efficient characterization technique that adopts a low-energy electrostatically focused electron gun and a super-aligned carbon nanotube (SACNT) film sample support. It allows rapid crystalline characterization of large-area graphene through a single photograph of a transmission-diffracted image at a large beam size. Additionally, the low-energy electron beam enables the observation of a unique diffraction pattern of adsorbates on the suspended graphene at room temperature. This work presents a simple and convenient method for characterizing the macroscopic structures of 2D materials, and the instrument we constructed allows the study of the weak interaction with 2D materials.

Demonstration of nonvolatile multilevel memory in ambipolar carbon nanotube thin-film transistors

Multilevel memories have attracted significant interest because of their larger memory density per unit cell. Here, we investigated multilevel operation with ambipolar carbon nanotube thin-film transistors. Three distinct conduction states and a direct change between any of them were demonstrated by selecting appropriate values for the magnitude and duration of each program/erase voltage pulse. A low operation voltage of 5 V and a short duration of 1 s were obtained by utilizing a bilayer Al2O3-epoxy dielectric to enhance the gate modulation efficiency. A tradeoff exists between low-voltage operation and fast switching for a given device.

Influence of Asymmetric Contact Form on Contact Resistance and Schottky Barrier, and Corresponding Applications of Diode

We have fabricated carbon nanotube and MoS2 field-effect transistors with asymmetric contact forms of source-drain electrodes, from which we found the current directionality of the devices and different contact resistances under the two current directions. By designing various structures, we can conclude that the asymmetric electrical performance was caused by the difference in the effective Schottky barrier height (ΦSB) caused by the different contact forms. A detailed temperature-dependent study was used to extract and compare the ΦSB for both contact forms of CNT and MoS2 devices; we found that the ΦSB for the metal-on-semiconductor form was much lower than that of the semiconductor-on-metal form and is suitable for all p-type, n-type, or ambipolar semiconductors. This conclusion is meaningful with respect to the design and application of nanomaterial electronic devices. Additionally, using the difference in barrier height caused by the contact forms, we have also proposed and fabricated Schottky barrier diodes with a current ratio up to 104; rectifying circuits consisting of these diodes were able to work in a wide frequency range. This design avoided the use of complex chemical doping or heterojunction methods to achieve fundamental diodes that are relatively simple and use only a single material; these may be suitable for future application in nanoelectronic radio frequency or integrated circuits.