Xibo Yuan

Wide Damping Region for LCL -Type Grid-Connected Inverter With an Improved Capacitor-Current-Feedback Method

This paper has presented a stability analysis of a LCL-type grid-connected inverter in the discrete-time domain. It has been found that even though the system is stable when the resonance frequency f,. is higher than one-sixth of the sampling frequency (f8/6), an effective damping scheme is still required due to the potential influence of the grid impedance. With a conventional proportional capacitor-current-feedback active damping (AD), the valid damping region is only up to f8/6. This however is not sufficient in the design process for obtaining a high quality output current and the system can easily become unstable due to the resonance frequency shifting. Considering the resonance frequency design rules of the LCL filter, this paper proposes an improved capacitor-current-feedback AD method. With a detailed analysis and proper parameter design, the upper limit of the damping region is extended to f8/4, which can cover all the possible resonance frequencies. Then, the damping performance of the proposed AD method is studied. It shows that the optimal damping is obtained when the actual resonance frequency is (fr + f8/4)/2. Moreover, an approximate calculation for the optimal damping coefficient R is given. Finally, the experimental results have validated the effectiveness of the proposed AD method.

Design and Experimental Evaluation of Fast Model Predictive Control for Modular Multilevel Converters

In recent years, modular multilevel converters (MMCs) are very popular in medium/high-voltage motor drive systems and high-voltage direct-current (HVDC) applications. The conventional model predictive control (MPC) strategies for the MMC are not practical due to their substantial calculation requirements, especially under high number of voltage levels. To solve this problem, a fast MPC strategy combined with a submodule (SM)-voltage sorting balancing method is proposed based on the discrete mathematical model derived for the MMC in this paper. By optimizing the implementation of the control objectives and simplifying the rolling optimization, the proposed strategy is simpler to expand to a system with larger number of SMs, with the amount of calculation reduced and the advantages of the conventional MPC algorithm reserved. In addition, the proposed control can minimize the dv/dt of the output voltages. Both steady-state and transient performances are evaluated by a down-scaled three-phase MMC prototype under various experimental conditions, which validates the proposed fast MPC strategy.

Grid Harmonics Suppression Scheme for LCL -Type Grid-Connected Inverters Based on Output Admittance Revision

In this paper, the influence of grid harmonics on the output current of grid-connected inverters with an LCL filter is investigated by means of the output admittance. With the complex transfer model of the output admittance, the full-feedforward scheme of grid voltage is derived, which, however, is difficult to be implemented due to the derivative terms in the feedforward link. A detailed theoretical analysis is also presented to explain the compensation error introduced by the active damping and delays when the grid voltage proportional feedforward is adopted. Then a feedforward scheme based on the band-pass filter (BPF) is proposed to compensate the grid harmonics at the selected frequencies, and the parameters of the BPF are derived to revise the output admittance. It has also been found that with the commonly used phase-locked loop (PLL), an additional admittance matrix is introduced. The compensation effect will be degraded when the PLL with a high bandwidth is used for tracking grid phase accurately. Therefore, a modified PLL is proposed to revise the output admittance again, for suppressing the output current distortion arising from the grid harmonics, which propagate to control system through the PLL. Finally, the experimental results verify the effectiveness of the proposed scheme, where the current harmonics are effectively suppressed.

An Improved Grid-Voltage Feedforward Strategy for High-Power Three-Phase Grid-Connected Inverters Based on the Simplified Repetitive Predictor

When faced with distorted grid voltage, more harmonics will appear in the output currents of the grid-connected inverters. The grid-voltage feedforward strategy, as the most direct solution to compensate the harmonics, however, is seriously affected by the errors in the grid-voltage feedforward loop, such as delays. This issue is more significant for high-power inverters, where the switching frequency is relatively low (<; 5 kHz), and the grid-interface inductance is small (<; 0.5 mH). The errors mainly include the signal distortion caused by the conditioning circuits, the control delay of the digital controller, and the zero-order hold (ZOH) characteristic of pulse width modulation (PWM). In this paper, several improvements have been made to reduce the signal distortion and compensate the delays. A second-order Butterworth low-pass filter in the conditioning circuit is carefully designed with the maximum flat magnitude response and the almost linear phase response to avoid distorting the measured grid voltage. Furthermore, based on the conventional repetitive predictor, an open-loop simplified repetitive predictor is proposed to compensate the delays in the grid-voltage feedforward loop. Three predictive steps are achieved by the open-loop simplified repetitive predictor to compensate the delays: one step for the delay caused by the conditioning circuit, the second step for the control delay of the digital controller, and the third step for the ZOH characteristic of PWM. The effectiveness of the improved grid-voltage feedforward strategy are experimentally validated on a 250-kVA solar power generation system, where the current harmonics are effectively attenuated. In addition, the inverter starting current is suppressed.

EMI Generation Characteristics of SiC and Si Diodes: Influence of Reverse-Recovery Characteristics

Silicon carbide (SiC) Schottky diodes with zero reverse-recovery current (RRC) are perceived as superior due to their reduced switching losses. The absence of reverse-recovery behavior in these devices is also expected to result in reduced electromagnetic interference (EMI), compared with the conventional silicon (Si) PIN diodes. In this letter, the influence of SiC Schottky diodes on EMI generation in hard-switched power converters is investigated. A simplified analytical model enabling the spectral envelope of the diode current waveform to be predicted is presented. Numerical simulations and experimental tests are employed to validate this model. It is found that although the reverse-recovery characteristics are very different between Si diodes and SiC Schottky diodes, the actual improvement with SiC diodes on the spectral content of the diode current waveforms is relatively small except at frequencies around 5 MHz. Factors affecting the EMI performance such as the peak amplitude and the “snappiness” of the RRC are also analyzed. Experimental measurements of the switching current waveforms for both Si diodes and SiC diodes are presented and their frequency spectra are compared.

Minimization of the DC Component in Transformerless Three-Phase Grid-Connected Photovoltaic Inverters

The dc component is a special issue in transformerless grid-connected photovoltaic (PV) inverter systems and may cause problems regarding system operation and safety. IEEE standard 1547-2003 has defined the limit for dc component in the grid-side ac currents, e.g., below 0.5% of the rated current. The dc component can cause line-frequency power ripple, dc-link voltage ripple, and a further second-order harmonic in the ac current. This paper has proposed an effective solution to minimize the dc component in three-phase ac currents and developed a software-based approach to mimic the blocking capacitors used for the dc component minimization, the so-called virtual capacitor. The “virtual capacitor” is achieved by adding an integral of the dc component in the current feedback path. A method for accurate extraction of the dc component based on double time integral, as a key to achieve the control, has been devised and approved effective even under grid-frequency variation and harmonic conditions. A proportional-integral-resonant controller is further designed to regulate the dc and line-frequency component in the current loop to provide precise control of the dc current. The proposed method has been validated on a 10-kVA experimental prototype, where the dc current has been effectively attenuated to be within 0.5% of the rated current. The total harmonic distortion and the second-order harmonic have also been reduced as well as the dc-link voltage ripple.

Effect of load parasitics on the losses and ringing in high switching speed SiC MOSFET based power converters

In this paper the effect of parasitic elements of the load connected to a power converter are considered. For the case of a high switching speed converter the equivalent parallel capacitance of the load or line inductance will cause a potentially large current overshoot, which will in turn lead to increased switching losses. This paper considers the relation between the operating conditions of the converter, such as switching speed, with the loss due to the parasitic elements. The inclusion of a small output filter inductor to reduce the switching loss and ringing is analyzed and a method for calculating suitable component values to reach a desired target performance is presented.

Performance Evaluation of Split Output Converters With SiC MOSFETs and SiC Schottky Diodes

The adoption of silicon carbide (SiC) MOSFETs and SiC Schottky diodes in power converters promises a further improvement of the attainable power density and system efficiency, while it is restricted by several issues caused by the ultrafast switching, such as phase-leg shoot-through (“crosstalk” effect), high turn-on losses, electromagnetic interference (EMI), etc. This paper presents a split output converter, which can overcome the limitations of the standard two-level voltage source converters when employing the fast-switching SiC devices. A mathematical model of the split output converter has been proposed to reveal how the split inductors can mitigate the crosstalk effect caused by the high switching speed. The improved switching performance (e.g., lower turn-on losses) and EMI benefit have been demonstrated experimentally. The current freewheeling problem, the current pulses and voltage spikes of the split inductors, and the disappeared synchronous rectification are explained in detail both experimentally and analytically. The results show that the split output converter can have lower power device losses compared with the standard two-level converter at high switching frequencies. However, the extra losses in the split inductors may impair the efficiency of the split output converter, which is verified by experiments in the continuous operating mode. A 95.91% efficiency has been achieved by the split output converter at the switching frequency of 100 kHz with suppressed crosstalk, lower turn-on losses, and reduced EMI.

A Dual Three-Level Inverter-Based Open-End Winding Induction Motor Drive With Averaged Zero-Sequence Voltage Elimination and Neutral-Point Voltage Balance

Two three-level inverters driving an open-end winding induction motor can generate equivalent voltage waveforms as a single five-level inverter-based drive. In addition, it can bring in benefits such as reduced dc-link voltage, less number of devices, and fault-tolerant capability, which is favored in high-power motor drive applications. The main challenge with this type of configuration is the appearance of large zero-sequence current circulating between the two inverters, which generates extra losses in the switching devices and the motor as well as affects the normal operation of the machine. Another challenge is to balance the dc-link neutral point voltage of the two three-level inverters. This paper has proposed a simplified decoupled space-vector pulsewidth-modulation (PWM) strategy to eliminate the averaged zero-sequence voltage in each switching cycle by the placement of redundant vectors of each individual inverter using a time shift. Neutral point voltage balance is further achieved by adjusting the time duration of the redundant vectors. In this paper, it is shown that it is possible to operate this kind of drive configuration with a single dc power supply and achieve averaged zero-sequence voltage elimination and neutral-point voltage balancing at the same time. Experimental results of a 5.5-kW dual three-level inverter drive using the proposed PWM strategy are presented, which validates the control method and drive configuration.

A four-level π-type converter for low-voltage applications

This paper has introduced a four-level π-type converter for low-voltage applications which has a simple structure with six switches per phase leg. The line output voltage has seven levels and the output harmonics is much lower than the conventional two-level converter. The switching states and their associated output voltage levels have been analyzed. A simple carrier-based modulation method with zero-sequence signal injection has been devised to modulate the converter and regulate dc-link neutral points voltages. The two neutral points voltages can be well controlled with a back to back configuration even under high modulation index and high power factor. Simulation and experimental results have validated the topology, modulation and control strategy for the four-level π-type converter.