Xuejun Pei

Open-Circuit Fault Diagnosis and Fault-Tolerant Strategies for Full-Bridge DC–DC Converters

This paper proposes a four-step open-circuit fault diagnosis and fault-tolerant scheme for isolated phase-shifted full-bridge (PSFB) dc-dc converters to improve the reliability. The fault diagnostic method utilizes the primary voltage of the transformer as the diagnostic criterion, which can be obtained easily by adding an auxiliary winding. When an open-circuit fault occurs in any switch of the PSFB converter, the proposed fault detection method can generate an indication of the abnormal state and trigger an active-phase-shifted in the control system. Under the APS state, it is very easy to locate the exact position of faulty switch because the voltage waveform of the primary winding heavily depends on the location of the faulty switch. After locating the position of the faulty switch, the PSFB converter is reconfigured into an asymmetrical half-bridge (AHB) converter by turning ON the normal switch in the faulty leg and adding a redundant winding to the secondary side. Therefore, the rebuilt AHB converter can keep the output voltage constant under a reduced power rating after the open-circuit fault. The operational principle, design consideration, and implementation are discussed in this paper. The experimental results are given to verify the validity of theoretical analysis. The proposed strategies outperform the traditional schemes in terms of cost, reliability, and power density.

A Novel PWM Technique in Digital Control

One problem with microprocessor-based high-frequency pulsewidth-modulation (PWM) converters is the modulating resolution limitation caused by limited-time resolution of hardware timers. In this paper, a novel PWM technique, the double PWM (DPWM), is proposed. DPWM combines the advantages of low-frequency modulation and high-frequency switching in power conversion and resolves the contradiction between high frequency and accuracy in a digital control scheme. DPWM effectively increases the resolution in digital control, while the harmonics introduced by this method is found to be negligible. Theoretical analysis, characteristics, and design considerations are given, and they are verified by experiments on a 5.5-kW 20-kHz insulated-gate-bipolar-transistor boost-buck converter

Monitoring and Diagnosis for the DC–DC Converter Using the Magnetic Near Field Waveform

A new diagnostic method for the dc-dc converter, which utilizes the magnetic near field as the diagnostic criterion, is proposed in this paper. The magnetic near field of the converter is captured using a loop magnetic near field probe. The frequency information in the measured waveform is extracted by the fast Fourier transfer; the interested low-order harmonic components are classified by the neural network while the interested high-order harmonic components are evaluated using the simple mathematical method. Finally, by compromising the results of the two parts, the detailed diagnostic conclusions are obtained. In this paper, the methodologies of the measurement and diagnosis are clearly described; then, the proposed method is used to monitor and diagnose the buck and phase shift full bridge converters. The experimental results are presented to show the validity of the analysis. Since the two chosen examples include most of the potential situations, the proposed method can be generalized and applied to many other types of converters.

Fault Diagnosis of PWM DC–DC Converters Based on Magnetic Component Voltages Equation

Switch fault diagnosis is an important design aspect for pulse width modulation (PWM) dc-dc power converters. It can prevent power converters from further damage, and also make preparations for remedial actions. In this paper, a fast switch fault diagnostic method is proposed for PWM dc-dc converters operating in continuous conduction mode. The proposed method utilizes the magnetic component (inductor or transformer) voltage for fault diagnosis. Based on the real-time voltage measurement and switch gate-driver signals, characteristics of switch open-circuit faults and short-circuit faults are rapidly extracted, and thus, switch faults can be quickly detected. The magnetic component voltage can be measured by an auxiliary winding in the magnetic core, and gate-driver signals can be easily got from the control circuit. Moreover, the fault detection can be implemented by a low-cost logical hardware circuit, and this circuit can be integrated into the control circuit. The fault diagnosis principle, design considerations, and implementation are discussed in this paper. Experiments are conducted to verify the theoretical analysis.

Switch Short-Circuit Fault Diagnosis and Remedial Strategy for Full-Bridge DC–DC Converters

Switch fault diagnosis and remedial actions are an important design aspect for isolated full-bridge dc-dc converters, and they can highly improve reliability of the whole system. In this paper, a fast switch short-circuit fault (SCF) diagnostic method is proposed for the phase-shifted full-bridge (PSFB) converter. The dc-link current and transformer primary voltage are treated as diagnosis criteria. Based on the combination of real-time criteria and switch gate-driver signals, the switch SCF can be identified rapidly, and thus further damage can be avoided. Besides, a remedial action for the faulty PSFB converter is introduced to keep the continuity of the system. The converter under fault can be reconfigured into an asymmetrical half-bridge converter. Moreover, a boost unit, including a switch and a diode, is inserted into between the output rectifier and filter capacitor to compensate the output voltage. The operational principle, design considerations, and implementation are discussed in this paper. Experimental results are shown to verify the validity of theoretical analysis.

Investigation, Evaluation, and Optimization of Stray Inductance in Laminated Busbar

Wiring inductance has a critical effect on electrical, thermal, and electromagnetic compatibility (EMC) performances in inverters. Therefore, the low stray inductance laminated busbar, as a state-of-the-art pathway interface, is widely used in high-power inverters. However, the asymmetrical stray inductances of the laminated busbar may cause different voltage and thermal stresses for semiconductor devices of the same power stage. In order to achieve low and symmetrical stray inductances in the laminated busbar, this paper presents the investigation, evaluation, and optimization of the stray inductances of the laminated busbar. Based on the current commutation loop (CCL) analysis, the investigation of two-layer, three-layer, and multilayer laminated busbars is proposed through three-dimensional (3-D) finite element analysis (FEA) simulations. It can be found that the skin effect, mutual effect, CCL length, CCL separation distance, and split plate significantly influence the stray inductance of laminated busbars. Furthermore, the multilayer laminated busbar structure for multilevel neutral point clamped (NPC) inverter is derived. On the basis of the theoretical analysis, CCL stray inductances of a three-layer laminated busbar are extracted by means of FEA simulation and an improved impedance resonant measurement in a single-phase H-bridge high-power inverter. Insulated gate bipolar transistor (IGBT) voltage overshoot waveforms further validate the stray inductance asymmetry of the laminated busbar. A compromise between the stray inductance and symmetry is proposed in the three-layer laminated busbar. Finally, several feasible guidelines for the optimization of the laminated busbar design are introduced.

Short-Circuit Fault Protection Strategy for High-Power Three-Phase Three-Wire Inverter

This paper proposes a four-stage fault protection scheme against the short-circuit fault for the high-power three-phase three-wire combined inverter to achieve high reliability. The short-circuit fault on the load side is the focus of this paper, and the short-circuit fault of switching devices is not involved. Based on the synchronous rotating frame, the inverter is controlled as a voltage source in the normal state. When a short-circuit fault (line-to-line fault or balanced three-phase fault) occurs, the hardware-circuit-based hysteresis current control strategy can effectively limit the output currents and protect the switching devices from damage. In the meantime, the software controller detects the fault and switches to the current controlled mode. Under the current controlled state, the inverter behaves as a current source until the short-circuit fault is cleared by the circuit breaker. After clearing the fault, the output voltage recovers quickly from the current controlled state. Therefore, the selective protection is realized and the critical loads can be continuously supplied by the inverter. The operational principle, design consideration, and implementation are discussed in this paper. The simulation and experimental results are provided to verify the validity of theoretical analysis.

The Multiple-Output DC–DC Converter With Shared ZCS Lagging Leg

A multiple-output dc-dc converter with shared zero-current-switching (ZCS) lagging leg is presented in this paper. In this proposed converter, each output is regulated by the phase shifted between the independent leading legs and the shared lagging leg. The switches in the leading legs process the individual output power and work in zero-voltage switching (ZVS), which are suitable for utilizing the MOSFETs; the switches in the shared lagging leg process the total output power and work in ZCS, which especially suit for using the insulated gate bipolar transistor. The ZVS of the leading legs is easy to achieve and the ZCS of the lagging leg is independent of the loads. Therefore, the proposed converter has compact structure, fully regulation abilities, adapted soft-switching modes, and simple modulation schemes. Moreover, the new outputs can be conveniently obtained by using the uniform algorithm. In this paper, the derivation of the proposed converter is presented; the proposed shared ZCS lagging leg converter with dual output is analyzed, and the analysis is further extended to the general multiple-output situation; the state variation of the proposed converter is also surveyed; finally, a three-output prototype with 200-240 V input, 24 V/5 A, 15 V/15 A, and 12 V/10 A outputs is built, and the analysis is verified by the experimental results.

Analysis and Calculation of DC-Link Current and Voltage Ripples for Three-Phase Inverter With Unbalanced Load

In this paper, an analysis and calculation of the dc-link current and voltage ripples are presented for a three-phase inverter with unbalanced load. A comparison of the dc-link average and root-mean-square (rms) currents between considering and ignoring high frequency harmonics of the output current is drawn. It is shown that high frequency harmonic currents have little effect on the dc-link current, and therefore, they can be ignored. Based on the symmetrical components method, the dc-link average and harmonic rms currents are derived, and the dc-link voltage ripple is compared between the balanced and unbalanced loads. It can be found that the dc-link current and voltage ripples consist of not only high frequency harmonics but also the double fundamental frequency harmonic, and the voltage ripple is independent of the positive-sequence component and determined by the negative-sequence component, under the unbalanced load. Experimental results are shown to verify the accuracy of the theoretical analysis.

A high performance dual output dc-dc converter combined the phase shift full bridge and LLC resonant half bridge with the shared lagging leg

A new dual output dc-dc converter is proposed in this paper. The first output works as a conventional full bridge converter; by connecting a LLC resonant tank to the lagging leg, a half bridge resonant converter is structured, and the second output is obtained. The first output is regulated by the phase shift and the second output by the switching frequency. Both of the outputs are fully regulated and independent. The narrow frequency variation of the LLC part makes the magnetic components easy to optimize. The ZVS of the leading leg is easy to achieve by the phase shift operation, the ZVS range of the lagging leg is extended down to empty load by the shared structure. Moreover, compared to the conventional full bridge phase shift converter, the shared lagging leg offers a loose dead-time limitation. Therefore the proposed converter is low cost, high reliability, high efficiency and high performance. A 300V input, 36V/10A, 24V/10A outputs prototype is build to verify the design.