Y. Douvry
Centre national de la recherche scientifique
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Featured researches published by Y. Douvry.
IEEE Electron Device Letters | 2009
Clemens Ostermaier; Gianmauro Pozzovivo; Jean-François Carlin; Bernhard Basnar; W. Schrenk; Y. Douvry; C. Gaquiere; Jean-Claude DeJaeger; K. Čičo; K. Fröhlich; M. Gonschorek; N. Grandjean; G. Strasser; D. Pogany; J. Kuzmik
We present GaN-based high electron mobility transistors (HEMTs) with a 2-nm-thin InAlN/AlN barrier capped with highly doped n++ GaN. Selective etching of the cap layer results in a well-controllable ultrathin barrier enhancement-mode device with a threshold voltage of +0.7 V. The n++ GaN layer provides a 290-Omega/\square sheet resistance in the HEMT access region and eliminates current dispersion measured by pulsed IV without requiring additional surface passivation. Devices with a gate length of 0.5-mum exhibit maximum drain current of 800 mA/mm, maximum transconductance of 400 mS/mm, and current cutoff frequency fT of 33.7 GHz. In addition, we demonstrate depletion-mode devices on the same wafer, opening up perspectives for reproducible high-performance InAlN-based digital integrated circuits.
IEEE Transactions on Electron Devices | 2010
J. Kuzmik; Clemens Ostermaier; Gianmauro Pozzovivo; Bernhard Basnar; W. Schrenk; Jean-François Carlin; M. Gonschorek; E Feltin; N. Grandjean; Y. Douvry; C Gaquière; J.C. De Jaeger; K. Čičo; K Fröhlich; J Škriniarová; J Kováč; G. Strasser; D. Pogany; E. Gornik
Design considerations and performance of n++ GaN/InAlN/AlN/GaN normally off high-electron mobility transistors (HEMTs) are analyzed. Selective and damage-free dry etching of the gate recess through the GaN cap down to a 1-nm-thick InAlN barrier secures positive threshold voltage, while the thickness and the doping of the GaN cap influence the HEMT direct current and microwave performance. The cap doping density was suggested to be 2 × 1020 cm-3. To screen the channel from the surface traps, the needed cap thickness was estimated to be only 6 nm. Design is proved by an experiment showing a constant value of the HEMT dynamical access resistance, while a single-pulse experiment indicated almost collapse-free performance. On the other hand, it is found that the n++ GaN cap does not contribute to the HEMT drain current conduction, nor does it provide a path for the off-state breakdown. HEMTs with a gate length of 0.25 μm and a 4-μm source-to-drain distance show a drain-to-source current of 0.8 A/mm, a transconductance of 440 mS/mm, a threshold voltage of ~0.4 V, and a cutoff frequency of 50 GHz. A thin and highly doped GaN cap is also found to be suitable for the processing of normally on HEMTs by adopting the nonrecessed gate separated from the cap by insulation.
IEEE Electron Device Letters | 2009
N. Defrance; J. Thorpe; Y. Douvry; V. Hoel; J.C. De Jaeger; C. Gaquiere; Xiao Tang; M. A. di Forte-Poisson; Robert Langer; M. Rousseau; H. Lahreche
In this letter, successful operation at 10 GHz of T-gate HEMTs on epitaxial structures grown by metal-organic chemical vapor deposition (MOCVD) or MBE on composite substrates is demonstrated. The used device fabrication process is very similar to the process used on monocrystalline SiC substrate. High power density was measured on both epimaterials at 10 GHz. The best value is an output power density of 5.06 W/mm associated to a power-added efficiency (PAE) of 34.7% and a linear gain of 11.8 dB at VDS = 30 V for the components based on MOCVD-grown material. The output power density is 3.58 W/mm with a maximum PAE of 25% and a linear gain around 15 dB at VDS = 40 V for the MBE-grown material.
IEEE Transactions on Electron Devices | 2013
N. Defrance; F. Lecourt; Y. Douvry; M. Lesecq; V. Hoel; A. Lecavelier des Etangs-Levallois; Y. Cordier; A. Ebongue; J.C. De Jaeger
This paper reports on the dc analysis and radio frequency (RF) characterization of a flexible AlGaN/GaN high-electron mobility transistor with a 120-nm gate length. The device provides a maximum dc current density of 470 mA/mm and a peak extrinsic transconductance of 125 mS/mm under flat condition. When the substrate is bent with 0.88% strain, a rise in the 2-DEG density is experimentally observed through the diminution of the on-resistance. This phenomenon is physically attributed to the modification of the piezoelectric field within the barrier under tensile condition. The device also shows a current gain cutoff frequency (Ft) of 32 GHz and a power gain cutoff frequency (Fmax) of 52 GHz. No major variations of RF performance are observed under bending.
PHYSICS OF SEMICONDUCTORS: 30th International Conference on the Physics of Semiconductors | 2011
Clemens Ostermaier; G. Pozzovivo; J.-F. Carlin; Bernhard Basnar; W. Schrenk; A. M. Andrews; Y. Douvry; C. Gaquiere; J.‐C. De Jaeger; L. Tóth; B. Pecz; M. Gonschorek; E. Feltin; N. Grandjean; G. Strasser; D. Pogany; J. Kuzmik
We investigated a 2 nm thin InAlN/AlN barrier after recessing of a GaN cap on top of it and Ir gate metallization. Detailed analysis of the recess process revealed practically no damage until the formation of an etch‐resistant barrier layer producing nitrogen vacancies and hence defect assisted tunneling through the thin barrier. Annealing of the Ir‐based gate stack showed a reduction of the electrical distance between the gate and the channel. The effect was linked to an oxygen‐containing interface layer between the Ir metal and the InAlN layer where oxygen diffused into Ir at elevated temperatures. Resulting devices showed state‐of‐the‐art normally‐off performance.
international conference on advanced semiconductor devices and microsystems | 2010
J. Kuzmik; Ostermaier; G. Pozzovivo; Bernhard Basnar; W. Schrenk; J.-F. Carlin; M. Gonschorek; E. Feltin; N. Grandjean; Y. Douvry; Ch. Gaquière; J.C. De Jaeger; G. Strasser; D. Pogany; E. Gornik
We correlate dc maximal drain current I<inf>DSmax</inf>, pulsed output characteristics, rf small-signal and breakdown performance of normally-off InAlN/GaN HEMTs with varied gate-to-drain distance d<inf>GD</inf>. It is found that parasitic lag effects which are related to the possible surface states are not appearing at longer d<inf>GD</inf>. On the other hand compromise need to be found between the improved gate performance and impaired I<inf>DSmax</inf> and f<inf>T</inf> as the d<inf>GD</inf> is increased. The leakage current of the 0.5 µm-long gate may be reduced by up-to three orders of magnitude, down to µA/mm at −20 V bias if d<inf>GD</inf> increases from 3 to 15 µm. On the other hand I<inf>DSmax</inf> and f<inf>T</inf> drop by about one third of the original value (from about 0.6 A/mm and 34 GHz down to 0.4 A/mm and 21 GHz, respectively) if d<inf>GD</inf> changes.
Electronics Letters | 2010
Nicolas Defrance; Y. Douvry; V. Hoel; J.-C. Gerbedoen; A. Soltani; M. Rousseau; J.C. De Jaeger; Robert Langer; H. Lahreche
european solid state device research conference | 2010
F. Lecourt; Y. Douvry; Nicolas Defrance; V. Hoel; J.C. De Jaeger; S. Bouzid; M. Renvoise; D. Smith; H. Maher
european microwave integrated circuits conference | 2009
Jean-Claude De Jaeger; V. Hoel; Nicolas Defrance; Y. Douvry; C. Gaquiere; Marie-Antoinette di Forte-Poisson; J. Thorpe; H. Lahreche; Robert Langer
Electronics Letters | 2010
V. Hoel; Nicolas Defrance; Y. Douvry; J.C. De Jaeger; N. Vellas; C. Gaquiere; M. A. di Forte-Poisson; J. Thorpe; Robert Langer