Ya-Xiong Zhou

16 Boolean logics in three steps with two anti-serially connected memristors

Memristor based logic gates that can execute memory and logic operations are regarded as building blocks for non Von Neumann computation architecture. In this letter, Ta/GeTe/Ag memristors were fabricated and showed reproducible binary switches between high-resistance and low-resistance states. Utilizing a structure with two anti-serially connected memristors, we propose a logic operation methodology, based on which arbitrary Boolean logic can be realized in three steps, and the logic result can be nonvolatilely stored. A functionally complete logic operation: NAND is further verified by HSPICE simulation and experiments. The implementation of logic-in-memory unit may stimulate the development of future massive parallel computing.

Functionally Complete Boolean Logic in 1T1R Resistive Random Access Memory

Nonvolatile stateful logic through RRAM is a promising route to build in-memory computing architecture. In this letter, a logic methodology based on 1T1R structure has been proposed to implement functionally complete Boolean logics. Arbitrary logic functions could be realized in two steps: initialization and writing. An additional read step is required to read out the logic result, which is in situ stored in the nonvolatile resistive state of the memory. Cascade problem in building larger logic circuits is also discussed. Our 1T1R logic device and operation method could be beneficial for massive integration and practical application of RRAM-based logic.

Conducting mechanisms of forming-free TiW/Cu2O/Cu memristive devices

P-type Cu2O is a promising CMOS-compatible candidate to fabricate memristive devices for next-generation memory, logic and neuromorphic computing. In this letter, the microscopic switching and conducting mechanisms in TiW/Cu2O/Cu memristive devices have been thoroughly investigated. The bipolar resistive switching behaviors without an electro-forming process are ascribed to the formation and rupture of the conducting filaments composed of copper vacancies. In the low resistive state, the transport of electrons in the filaments follows Motts variable range hopping theory. When the devices switch back to high resistive state, the coexistence of Schottky emission at the Cu/Cu2O interface and electron hopping between the residual filaments is found to dominate the conducting process. Our results will contribute to the further understanding and optimization of p-type memristive materials.

Customized binary and multi-level HfO 2−x -based memristors tuned by oxidation conditions

The memristor is a promising candidate for the next generation non-volatile memory, especially based on HfO2−x, given its compatibility with advanced CMOS technologies. Although various resistive transitions were reported independently, customized binary and multi-level memristors in unified HfO2−x material have not been studied. Here we report Pt/HfO2−x/Ti memristors with double memristive modes, forming-free and low operation voltage, which were tuned by oxidation conditions of HfO2−x films. As O/Hf ratios of HfO2−x films increase, the forming voltages, SET voltages, and Roff/Ron windows increase regularly while their resistive transitions undergo from gradually to sharply in I/V sweep. Two memristors with typical resistive transitions were studied to customize binary and multi-level memristive modes, respectively. For binary mode, high-speed switching with 103 pulses (10 ns) and retention test at 85 °C (>104 s) were achieved. For multi-level mode, the 12-levels stable resistance states were confirmed by ongoing multi-window switching (ranging from 10 ns to 1 μs and completing 10 cycles of each pulse). Our customized binary and multi-level HfO2−x-based memristors show high-speed switching, multi-level storage and excellent stability, which can be separately applied to logic computing and neuromorphic computing, further suitable for in-memory computing chip when deposition atmosphere may be fine-tuned.

Control of Synaptic Plasticity Learning of Ferroelectric Tunnel Memristor by Nanoscale Interface Engineering

Brain-inspired computing is an emerging field, which intends to extend the capabilities of information technology beyond digital logic. The progress of the field relies on artificial synaptic devices as the building block for brainlike computing systems. Here, we report an electronic synapse based on a ferroelectric tunnel memristor, where its synaptic plasticity learning property can be controlled by nanoscale interface engineering. The effect of the interface engineering on the device performance was studied. Different memristor interfaces lead to an opposite virgin resistance state of the devices. More importantly, nanoscale interface engineering could tune the intrinsic band alignment of the ferroelectric/metal-semiconductor heterostructure over a large range of 1.28 eV, which eventually results in different memristive and spike-timing-dependent plasticity (STDP) properties of the devices. Bidirectional and unidirectional gradual resistance modulation of the devices could therefore be controlled by tuning the band alignment. This study gives useful insights on tuning device functionalities through nanoscale interface engineering. The diverse STDP forms of the memristors with different interfaces may play different specific roles in various spike neural networks.

Memcomputing: fusion of memory and computing

In this world of ubiquitous computing, the contemporary electronic digital computer has become an essential machine that is available anytime and everywhere. Computing systems come in various forms, including desktops, laptops, tablets, mobile phones, smart watches, and other daily life devices. These systems all originate from the earliest huge, heavy EDVAC and UNIVAC machines of the 1940s, and all share a universal architecture conceived by von Neumann, who divided the computing system into five primary groups: a central arithmetic part (CA), a central control part (CC), memory (M) and outside recording medium (R), input, and output. The CA and CC parts evolved into the central processing unit (CPU), whereas the M and R correspond to the high-speed main memory that stores data and instructions (SRAM and DRAM) and external mass storage, respectively.

Reconfigurable logic in nanosecond Cu/GeTe/TiN filamentary memristors for energy-efficient in-memory computing

Owing to the capability of integrating the information storage and computing in the same physical location, in-memory computing with memristors has become a research hotspot as a promising route for non von Neumann architecture. However, it is still a challenge to develop high performance devices as well as optimized logic methodologies to realize energy-efficient computing. Herein, filamentary Cu/GeTe/TiN memristor is reported to show satisfactory properties with nanosecond switching speed (<60 ns), low voltage operation (<2 V), high endurance (>104 cycles) and good retention (>104 s @85 °C). It is revealed that the charge carrier conduction mechanisms in high resistance and low resistance states are Schottky emission and hopping transport between the adjacent Cu clusters, respectively, based on the analysis of current-voltage behaviors and resistance-temperature characteristics. An intuitive picture is given to describe the dynamic processes of resistive switching. Moreover, based on the basic material implication (IMP) logic circuit, we proposed a reconfigurable logic method and experimentally implemented IMP, NOT, OR, and COPY logic functions. Design of a one-bit full adder with reduction in computational sequences and its validation in simulation further demonstrate the potential practical application. The results provide important progress towards understanding of resistive switching mechanism and realization of energy-efficient in-memory computing architecture.

Correlation analysis between the current fluctuation characteristics and the conductive filament morphology of HfO2-based memristor

Memristors are attracting considerable interest for their prospective applications in nonvolatile memory, neuromorphic computing, and in-memory computing. However, the nature of resistance switching is still under debate, and current fluctuation in memristors is one of the critical concerns for stable performance. In this work, random telegraph noise (RTN) as the indication of current instabilities in distinct resistance states of the Pt/Ti/HfO2/W memristor is thoroughly investigated. Standard two-level digital-like RTN, multilevel current instabilities with non-correlation/correlation defects, and irreversible current transitions are observed and analyzed. The dependence of RTN on the resistance and read bias reveals that the current fluctuation depends strongly on the morphology and evolution of the conductive filament composed of oxygen vacancies. Our results link the current fluctuation behaviors to the evolution of the conductive filament and will guide continuous optimization of memristive devices.