Yaniv Sa'ar
Weizmann Institute of Science
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Featured researches published by Yaniv Sa'ar.
computer aided verification | 2010
Amir Pnueli; Yaniv Sa'ar; Lenore D. Zuck
Jtlv is a computer-aided verification scripting environment offering state-of-the-art Integrated Developer Environment for algorithmic verification applications Jtlv may be viewed as a new, and much enhanced Tlv [18], with Java rather than Tlv-basic as the scripting language JTLV attaches its internal parsers as an Eclipse editor, and facilitates a rich, common, and abstract verification developer environment that is implemented as an Eclipse plugin.
verification model checking and abstract interpretation | 2008
Amir Pnueli; Yaniv Sa'ar
The paper presents a new deductive rule for verifying response properties under the assumption of compassion (strong fairness) requirements. It improves on previous rules in that the premises of the new rule are all first order.We prove that the rule is sound, and present a constructive completeness proof for the case of finite-state systems. For the general case, we present a sketch of a relative completeness proof. We report about the implementation of the rule in PVS and illustrate its application on some simple but non-trivial examples.
aspect-oriented software development | 2011
Shahar Maoz; Yaniv Sa'ar
We present AspectLTL, a temporal-logic based language for the specification and implementation of crosscutting concerns. AspectLTL enables the modular declarative specification of expressive concerns, covering the addition of new behaviors, as well as the specification of safety and liveness properties. Moreover, given an AspectLTL specification, consisting of a base system and a set of aspects, we provide AspectLTL with a composition and synthesis-based weaving process, whose output is a correct-by-construction executable artifact. The language is supported by a prototype tool and is demonstrated using a running example.
international conference on software engineering | 2013
Shahar Maoz; Yaniv Sa'ar
The scenario-based approach to the specification and simulation of reactive systems has attracted much research efforts in recent years. While the problem of synthesizing a controller or a transition system from a scenario-based specification has been studied extensively, no work has yet effectively addressed the case where the specification is unrealizable and a controller cannot be synthesized. This has limited the effectiveness of using scenario-based specifications in requirements analysis and simulation. In this paper we present counter play-out, an interactive debugging method for unrealizable scenario-based specifications. When we identify an unrealizable specification, we generate a controller that plays the role of the environment and lets the engineer play the role of the system. During execution, the former chooses environments moves such that the latter is forced to eventually fail in satisfying the systems requirements. This results in an interactive, guided execution, leading to the root causes of unrealizability. The generated controller constitutes a proof that the specification is conflicting and cannot be realized. Counter play-out is based on a counter strategy, which we compute by solving a Rabin game using a symbolic, BDD-based algorithm. The work is implemented and integrated with PlayGo, an IDE for scenario-based programming developed at the Weizmann Institute of Science. Case studies show the contribution of our work to the state-of-the-art in the scenario-based approach to specification and simulation.
aspect-oriented software development | 2012
Shahar Maoz; Yaniv Sa'ar
Tracing program actions back to the concerns that have caused them and blaming specific code artifacts for concern interference are known challenges of AOP and related advanced modularity paradigms. In this work we address these challenges in the context of AspectLTL, a temporal-logic based language for the specification and implementation of crosscutting concerns, which has a composition and synthesis-based weaving process whose output is a correct-by-construction executable artifact. When a specification is realizable, we provide two-way traceability information that links each allowed or forbidden transition in the generated program with the aspects that have justified its presence or elimination. When a specification is unrealizable, we provide an interactive game proof that demonstrates conflicts that should be fixed. The techniques are implemented and demonstrated using running examples.
computer aided verification | 2010
Ariel Cohen; Kedar S. Namjoshi; Yaniv Sa'ar
This paper describes Split, a compositional verifier for safety and general Ltl properties of shared-variable, multi-threaded programs The foundation is a computation of compact local invariants, one for each process, which are used for constructing a proof for the property An automatic refinement procedure gradually exposes more local information, until a decisive result (proof/disproof) is obtained.
computer aided verification | 2010
Ariel Cohen; Kedar S. Namjoshi; Yaniv Sa'ar
Proofs of progress properties often require fairness assumptions Directly incorporating global fairness assumptions in a compositional method is difficult, given the local flavor of such reasoning We present a fully automated local reasoning algorithm which handles fairness assumptions through a process of iterative refinement Refinement strengthens local proofs by the addition of auxiliary shared variables which expose internal process state; it is needed as local reasoning is inherently incomplete Experiments demonstrate that the new algorithm shows significant improvement over standard model checking.
haifa verification conference | 2010
Ariel Cohen; Kedar S. Namjoshi; Yaniv Sa'ar; Lenore D. Zuck; Katya I. Kisyova
We describe a parallel, symbolic, model-checking algorithm, built around a compositional reasoning method. The method constructs a collection of per-process (i.e., local) invariants, which together imply a desired global safety property. The local invariant computation is a simultaneous fixpoint evaluation, which easily lends itself to parallelization. Moreover, locality of reasoning helps limit both the frequency and the amount of cross-thread synchronization, leading to good parallel performance. Experimental results show that the parallelized computation can achieve substantial speed-up, with reasonably small memory overhead.
Journal of Computer and System Sciences | 2012
Ittai Balaban; Amir Pnueli; Yaniv Sa'ar; Lenore D. Zuck
We define the class of single-parent heap systems, which rely on a singly-linked heap in order to model destructive updates on tree structures. This encoding has the advantage of relying on a relatively simple theory of linked lists in order to support abstraction computation. To facilitate the application of this encoding, we provide a program transformation that, given a program operating on a multi-linked heap without sharing, transforms it into one over a single-parent heap. It is then possible to apply shape analysis by predicate and ranking abstraction. The technique has been successfully applied on examples with lists (reversal and bubble sort) and trees with of fixed arity (balancing of, and insertion into, a binary sort tree).
verification model checking and abstract interpretation | 2012
Roderick Bloem; Barbara Jobstmann; Nir Piterman; Amir Pnueli; Yaniv Sa'ar