Yanyu Ding

Design and implementation of intelligent RFID security authentication system

RFID has been widely developed during these years, and has massive size of the market. However, the security of RFID communication faces with many challenges during its development. In order to strengthen the security as well as reduce the power consumption and manufacturing cost, this paper researches and implements a low-power and high-security RFID authentication system. For the sake of the security during authentication, we design a random number generator which makes attackers impossible to predict what we transmit between reader and tag. To enhance the capability of encryption of RFID, we design and optimize triple DES algorithm which has low-power, low-complexity and high-security characteristics. Based on 180nm CMOS process, the hardware implementation of this system has a small area of 4597 gate equivalents and a low power consumption (only 6.8uW) when the clock frequency is 100KHZ.

A low-power parallel multiplier based on Optimized-Equal-Bypassing-Technique

A low power parallel multiplier based on Optimized-Equal-Bypassing-Technique is proposed in this paper. We first exploit a new full adder architecture which is capable of bypassing the addition operation when the two summand signals are equal. Then we optimize the full adder at the transistor level for lower power and smaller area purpose. After that, we employ the novel full adder to structure a parallel multiplier. The multiplier design is implemented with TSMC 0.18um technology and simulated with Hspice tool to estimate power dissipation. The simulation results prove that, compared with other designs in literature, the proposed multiplier shows its significant superiority in terms of power consumption as well as hardware overhead.

A novel anti-collision algorithm for RFID system

In this paper, we present the Intelligent Binary Tree Search anti-collision algorithm (IBTS). It is an optimized algorithm based upon a Dynamic Binary Tree Search anti-collision algorithm (DBTS). Our performance evaluation shows that IBTS surpasses other existing DBTS algorithms. According to our simulation results, the total identification time of IBTS algorithm is reduced by nearly 50% for 50 tags compared to DBTS algorithm. Moreover, with the increasing number of tags, IBTS algorithm has higher performance and less identifying time than DBTS algorithm. It has been applied to RFID transponder chip designed by ourselves and successfully fabricated in SMIC 0.18um process.