Yasuhiko Kanaya
University of Tokyo
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Featured researches published by Yasuhiko Kanaya.
design automation conference | 1981
Gotaro Odawara; Satoshi Kurishima; Hiroshi Aoyama; Yasuhiko Kanaya
This paper discusses a Circuit Information Processor(CIP), a subsystem of a Packaging Automation System(PAS), currently under development at the University of Tokyo. The CIP is an interactive design system for digital circuits. As an interactive tool for the CIP, a template which is used by the designer to enter the circuit information into the computer data base, has been developed in our laboratory. In the CIP, the data base for the packaging design system is generated by drawing a logic diagram with the template on a digitizer.
Archive | 2007
Kunio Arai; Hiroshi Aoyama; Yasuhiko Kanaya
Archive | 2008
Kunio Arai; Hiroshi Aoyama; Yasuhiko Kanaya
Archive | 1991
Norio Michigami; Tamio Otani; Yasuhiko Kanaya; Hiroyuki Kamata
Archive | 1991
Tamio Otani; Kunio Saitou; Yasuhiko Kanaya
Archive | 2010
Kunio Arai; Hiroshi Honda; Kazuhisa Ishii; Yasuhiko Kanaya
Archive | 1992
Kunio Arai; Yasuhiko Kanaya; Kazunori Hamada
Archive | 1990
Yasuhiko Kanaya; Tamio Otani; Kunio Arai
Archive | 1990
Yasuhiko Kanaya; Tamio Otani; Kunio Arai
Archive | 1990
Tamio Otani; Kazuhiro Kogure; Kunio Arai; Yasuhiko Kanaya; Kazunori Hamada
