Ying-Ren Chien

A Novel Continuous Wave Interference Detectable Adaptive Notch Filter for GPS Receivers

In this paper, we propose an interference detectable adaptive notch filter (ANF) for GPS receivers. The proposed ANF can estimate the existence of continuous wave interference (CWI) and its power, by exploiting the statistic value within an adaptive second-order infinite impulse response (IIR) filter. Moreover, our ANF is modulized, which allows more modules can be included to deal with multiple CWIs. We also design an adaptation algorithm for each ANF module and prove that the ANF module can adaptively notch the strongest CWI at its input, and this merit enables us to notch the primary CWIs with a limited number of ANF modules. Simulation results show that the adaption of the ANF modules converges in four iterations, and the signal to interference plus noise ratio (SINR) improvements can reach 21 dB.

Reduction of loop delay for digital symbol timing recovery systems using asynchronous equalization

Timing recovery loops with low loop delay are desirable. This paper presents receiver architectures with asynchronous equalization to reduce the loop delay. We propose a new asynchronous delayed least-mean-square (AD-LMS) adaptation algorithm together with an interaction-free loop to eliminate interaction between timing and equalization loops. In addition, a timing recovery scheme to reduce the timing jitter is developed. The proposed architecture can apply to 10GBASE-T systems. Simulation results show that the conventional approach suffers from the loop-interaction and the proposed method can eliminate this issue. Moreover, our approach has high phase margin, low gain peaking, and low jitter properties.

Equalization and Interference Cancellation with MIMO THP for 10GBASE-T

Unlike 1000BASE-T system, the far-end crosstalk (FEXT) must be suppressed by at least 20 dB to meet the high speed transmission requirement for 10GBASE-T. Without FEXT cancellation, the average decision-point signal-to-noise ratio (DP-SNR) can degrade by 3 dB. This paper presents a multi-input multi-output Tomlinson-Harashima precoding (MIMO THP) technique to equalize the channel and to cancel the FEXT interference. Besides, the corresponding training method to deal with delay skew among channels and the arrangement of different step-size in least mean square (LMS) adaptive algorithm are proposed as well. Simulation results show that delay skew compensation and step-sizes arrangement can improve DP-SNR by 4.59 dB and 1.62 dB, respectively. The proposed MIMO THP architecture improves the DP-SNR by 2.75 dB than The tenative decision based approach.

A Novel Transmitter-Side-Based Far-End Crosstalk Cancellation For 10GBASE-T

In 100BASE-T system, far end crosstalk (FEXT) interference generates a considerable loss in decision point signal-to-noise ratio (DP-SNR). For this reason, FEXT interference must be suppressed by at least 20 dB to achieve the DP-SNR requirement of 23.4 dB. This paper proposes a novel transmitter-side-based multiple-input-single-output (MISO) FEXT canceller to cancel FEXT interference at the receiver side. The coefficients of MISO FEXT canceller and equalizer are obtained by using least-mean-square adaptive filter techniques in training mode. Our simulation results show that the proposed method is able to suppress the FEXT interferences by about 28 dB and outperforms the traditional FEXT cancellation method by about 7.67 dB.

Impact of jamming excisor on the tracking loops for GPS receivers

It is well known that the narrowband interference (NBI) has severely degraded the quality of the received GPS signal and even demolish the operation of GPS receivers. Therefore, we propose using a frequency domain approach to excise NBIs for GPS receivers. Furthermore, we numerically analysis the impact of our proposed jamming excisor on the tracking loops for GPS receivers. Finally, we compare the approach in this thesis with one related previous work. Our method can handle more than two times the number of interference and at most eight jamming signals with jamming-to-signal ratio (JSR) of 25 dB. In this case, the anti-jamming filter does not affect the acquisition of C/A code phase and the resulting detection probability is over 90%; the resulting tracking errors are 10-3 chips, 0.5 Hz, and 0.20 degrees, with respect to the code phase, carrier frequency, and carrier phase.

Design of a Robust Multi-Channel Timing Recovery System With Imperfect Channel State Information for 10GBASE-T

The interdependence among multiple channels and the interaction between timing and equalization loops bring new challenges to the design of a multi-channel symbol timing recovery (STR) system for 10GBASE-T. In addition, the nonlinear Tomlinson-Harashima precoding (THP) technique used in the 10GBASE-T system is vulnerable to the imperfect channel state information (CSI). In this paper, we address the problem of timing inaccuracy caused by imperfect CSI and the problem of extracting correct timing information in the presence of channel-interdependence and loop-interaction for 10GBASE-T. This paper proposes a novel averaged-sampling-phase (ASP) hybrid STR scheme, which aligns the sampling clock phase of a single phase-locked loop (PLL) with an average value of the timing information provided by each wire pair so that the impact of the noisy timing information resulting from the imperfect CSI and the timing jitter of the single PLL is reduced. Moreover, a three-phase timing recovery strategy based on our architecture is also designed to correctly extract the timing information and effectively mitigate the loop-interaction. Simulation results demonstrate that the proposed multi-channel STR provides a complete loop-timed solution for 10GBASE-T and achieves a superior performance over conventional approaches in terms of robustness and timing jitter.

A Novel Baud-Rate Timing Error Detector Design for Baseband Transmission System Using Tomlinson-Harashima Precoder

Extraction of correct timing error information is very important for high-speed digital transmission systems. In this letter, a novel effective-data-sequence-based timing error detector (EDS-TED) is presented for a baseband transmission system using nonlinear Tomlinson-Harashima precoding (THP), such as 10GBASE-T. The key idea of our TED is to minimize the mean square error between the received and desired EDS, rather than between the transmitted data signals. This formulation can exploit the autocorrelation between the EDS signals and extract the timing information embedded in the received signal. Moreover, the proposed architecture can lead to a simple and feasible circuit implementation. Simulation results show that a timing loop based on the proposed EDS-TED achieves a superior performance over traditional TED in terms of the peak-to-peak jitter and the TED gain.

A Multi-channel Symbol Timing Recovery Architecture for 10GBASE-T System

A traditional symbol timing recovery architecture that used in 100BASE-T and 1000BASE-T is multi-phase selection based phase-locked loop (MPS-PLL). In 10GBASE-T system, the echo (ECHO) interference suppression requirement is much higher and hence the ECHO canceller is more sensitive to the timing jitter as well than that of 1000BASE-T system. Hence, the MPS-PLL architecture is difficult to implement in 10GBASE-T system. In this paper, we propose a hybrid symbol timing recovery (STR) architecture, which comprises a phase-locked loop (PLL) block accompanies three delay-locked loop (DLL) blocks as a four-channel STR system, and the corresponding finite state machine (FSM) control block that are suitable for 100BASE-T system. Finally, the complete simulation results, which include automatic gain control loop adaption, frequency offset estimation and correction, PLL phase and frequency recovery, DLL phase recovery, timing tracking, decision feedback equalizer training, echo canceller training and near end crosstalk canceller training in the training mode, show that the proposed four-channel STR architecture is practical.

Adaptive two-stage equalisation and FEXT cancellation architecture for 10GBASE-T system

For 10GBASE-T systems, variation in a multiple-input-multiple-output (MIMO) channel degrades the decision-point signal-to-noise ratio (DP-SNR) owing to imperfect pre-equalisation in the Tomlinson-Harashima precoding (THP) at the transmitter sides and catastrophic error propagation in far-end crosstalk (FEXT) cancellation at the receiver sides. Moreover, by using fixed THP coefficients during data transmission, as specified in the 10GBASE-T standard, and the non-linearity of THP pose challenges in the design of adaptive receivers. The authors propose an adaptive two-stage equalisation and FEXT cancellation (TS-EFC) architecture without updating the THP coefficients to combat channel variation at both the transmitter and receiver sides. In the first stage, we propose a new non-decision-directed FEXT canceller at the transmitter side using a joint training architecture to avoid error propagation. In the second stage, we devise an adaptive MIMO equaliser together with a novel pre-processing unit at the receiver side to combat channel variation. The pre-processing unit can eliminate the non-linearity issue by estimating both effective data sequences and precoded channel inputs. In addition, we develop a block least mean square algorithm that exploits the properties of two-dimensional modulated symbols for updating coefficients of the adaptive MIMO equaliser. Simulation results show that our TS-EFC architecture is robust against channel variation and significantly improves the DP-SNR. It eliminates the error propagation and also achieves faster convergence rates during the adaptation process.

A study of far-end crosstalk cancellation architecture for 10GBASE-T

In traditional fast Ethernet systems, such as 1000BASE-T, far-end crosstalk (FEXT) interferences are treated as noises, and can usually be tolerated. In 10GBASE-T system, the FEXT must be canceled by at least about 20 dB in order to achieve the required decision point signal-to-noise ratio (DP-SNR) of 23.4 dB. This paper not only proposes a power limited transmitter-side-based FEXT cancellation method, but also compare the proposed scheme with other FEXT cancellation architecture. Our simulation results show that, by using the proposed method, the FEXT interferences are suppressed by about 28 dB and the transmitted power spectrum will not be affected.