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Dive into the research topics where Yoav Hollander is active.

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Featured researches published by Yoav Hollander.


haifa verification conference | 2010

Special session on debugging

Yoav Hollander; Alan J. Hu; João Lourenço; Ronny Morad

In software, hardware, and embedded system domains, debugging is the process of locating and correcting faults in a system. Depending on the context, the various characteristics of debugging induce different challenges and solutions. Post-silicon hardware debugging, for example, needs to address issues such as limited visibility and controllability, while debugging software entails other issues, such as the handling of distributed or non-deterministic computation. The challenges that accompany such issues are the focus of many current research efforts. Solutions for debugging range from interactive tools to highly analytic techniques. We have seen great advances in debugging technologies in recent years, but bugs continue to occur, and debugging still encompasses significant portions of the lifecycles of many systems. The session covered state-of-the-art approaches as well as promising new research directions in both the hardware and software domains.


Archive | 2000

System and method for measuring temporal coverage detection

Yoav Hollander; Lev Plotnikov; Yaron Kashai


Archive | 2005

Method and apparatus for functionally verifying a physical device under test

Yoav Hollander; Yaron Kashai


Archive | 2011

Systems and methods for automatically generating executable system level-tests from a partially specified scenario

Yoav Hollander; Efrat Gavish; Vitaly Lagoon; Matan Vax


Archive | 2003

Method and system for test creation

Yoav Hollander; Yaron Kashai


Archive | 2010

Automatic debug apparatus and method for automatic debug of an integrated circuit design

Yoav Hollander; Yael Feldman


Archive | 2010

Transaction correlation system

Reshef Meir; Yael Kinderman; Yoav Hollander; Ohad Givaty


Archive | 2003

Method and system for automatically creating tests

Yoav Hollander; Yaron Kashai


haifa verification conference | 2009

Is Verification Getting Too Complex

Yoav Hollander


Archive | 2007

***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***Method and apparatus for functionally verifying a physical device under test

Yoav Hollander; Yaron Kashai

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Matan Vax

Cadence Design Systems

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Ohad Givaty

Cadence Design Systems

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Reshef Meir

Cadence Design Systems

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Alan J. Hu

University of British Columbia

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João Lourenço

Universidade Nova de Lisboa

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