Yong-Jae Jeong

Implementation of Real Time Video Watermark Embedder Based on Haar Wavelet Transform Using FPGA

In this paper, we propose an applicable technique in the real time applications using FPGA chip implementation technique which can be implemented by Haar wavelet based real time video watermarking for robust watermarking for copyright protection of video contents. Proposed method does algorithm design which can reduce computation complexity for hardware implantation and then implement hardware. In implementation result, we can confirm correct watermark inserting by FPGA simulation tool and cannot recognize concealed watermark in video sequence which insert watermark in original video sequence using implemented hardware watermark embedder system. Our implemented watermark embedding chipcan be useful in movie production and broadcasting companies that requires real-time based copyright protection system.

Implementation of Watermark Detection System for Hardware Based Video Watermark Embedder

In this paper, we implement hardware and software based watermark detection system for hardware based real-time video watermark embedder. We implement a watermark detector with STRATIX FPGA from ALTERA, PCI controller and Microsoft VC# by using Wiener filter and similarity technique for watermark detection. The performance of our implemented system is very good in term of visibility and robustness. Our implemented watermark detection system can be useful in movie production and broadcasting companies that requires real-time based copyright protection system.

Scale-invariant pattern recognition using a combined Mellin radial harmonic function and the bidimensional empirical mode decomposition

A novel scale and shift invariant pattern recognition method is proposed to improve the discrimination capability and noise robustness by combining the bidimensional empirical mode decomposition with the Mellin radial harmonic decomposition. The flatness of its peak intensity response versus scale change is improved. This property is important, since we can detect a large range of scaled patterns (from 0.2 to 1) using a global threshold. Within this range, the correlation peak intensity is relatively uniform with a variance below 20%. This proposed filter has been tested experimentally to confirm the result from numerical simulation for cases both with and without input white noise.

A fast partial distortion elimination algorithm using selective matching scan

Full search (FS) motion estimation has have been a big problem in real-time video coding because of enormous amount for calculation. Especially, the recent MPEG-4 AVC (advanced video coding) standard requires much more computations in motion estimation than the conventional MPEG-2 coding standard. In this paper, we propose a fast FS algorithm which can reduce only unnecessary computations significantly. Our algorithm is based on selective matching scan and elimination of unlike candidate blocks from initial matching error. According to the obtained matching order, we proceed to calculate matching errors and remove unlike candidate vectors based on PDE (Partial Distortion Elimination) method. Our algorithm takes about 4~10% of computations for block matching error compared with conventional FS algorithm without any degradation in prediction quality, thus our algorithm will be useful to real-time video coding applications using MPEG-4 AVC or MPEG-2 video coding standards.

FPGA based implementation of real-time watermarking for high definition video

In this paper, we propose a real-time video watermarking chip and system which is hardware based watermark embedding system of HD (high definition) video with STRATIX FPGA device from ALTERA. There was little visual artifact due to watermarking in subjective quality evaluation between the original video and the watermarked one. Embedded watermark was all extracted after a robustness test called format conversion video attacks such as HDMI (high definition multimedia interface) to HD-SDI (high definition serialized digital interface) conversion. Our implemented watermarking hardware system can be useful in movie production and broadcasting companies that requires real-time based copyright protection system.

Adaptive Shot Change Detection Technique for Real-Time Operation on PMP

Shot change detection is the main technique for automatic temporal segmentation of video. Until now, there were little research reports about real-time shot change detection for applying to hardware terminals with low performance such as PMPs (Portable Multimedia Player) and cellular phones. In this paper, we propose an adaptive real-time shot change detection algorithm using sub-sampling, weighting variance, and an adaptive threshold. We use weighting variance of frame difference for dividing feature extraction at a changed frame. We set an adaptive threshold using the average of variance from the next one of a last shot change frame to the previous one of a current frame. In the experiments, we obtained the detection rate of about 94.4% in overall accuracy. We verified real-time operation of shot change detection by implementing our algorithm on the TVUS HM-900 PMP from the company of Homecast. Therefore, our proposing algorithm will be helpful in searching video data on portable media player such as PMPs and cellular phones.

FPGA Based Implementation of Real-Time Video Watermarking Chip

In this paper, we propose a real-time video watermarking chip and system which is hardware based watermark embedding system of SD/HD (standard definition/high definition) video with STRATIX2 FPGA device from ALTERA. There was little visual artifact due to watermarking in subjective quality evaluation between the original video and the watermarked one. Embedded watermark was all extracted after a robustness test called natural video attacks such as A/D (analog/digital) conversion and MPEG compression. Our implemented watermarking hardware system can be useful in movie production and broadcasting companies that requires real-time based copyright protection system.

Implementation of a Real Time Watermarking Hardware System for Copyright Protection of a Contents in Digital Broadcasting

A watermarking for copyright protection of digital contents for broadcasting have to be made for a real-time system. In this paper, we propose a real-time video watermarking system which is hardware-based watermarking system of SD/HD (standard definition/high definition) video with the STRATIX FPGA device from ALTERA. There was little visual artifact due to watermarking in subjective quality evaluation between the original video and the watermarked one in our experiment. Embedded watermark was extracted after robustness testscalled natural video attacks such as A/D (analog/digital) conversion. Our implemented watermarking hardware system can be useful in movie production and broadcasting companies that requires real-time contents protection systems.

FPGA Implementation of Video Watermark Embedding System

In this paper, we propose a real-time video watermarking chip and system which is hardware based watermark embedding system of SD/HD (standard definition/high definition) video with STRATIX FPGA device from ALTERA as well as we implement the watermark detector which is hardware and software based detector system with STRATIX FPGA, PCI controller and VC++. There was little visual artifact due to watermarking in subjective quality evaluation between the original video and the watermarked one. Embedded watermark was all extracted after a robustness test called natural video attacks such as A/D (analog/digital) conversion and MPEG compression. Our implemented watermarking hardware system can be useful in movie production and broadcasting companies that requires real-time based copyright protection system.