Yong-Jin Kwon
University of California, Berkeley
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Featured researches published by Yong-Jin Kwon.
international symposium on computer architecture | 2010
Scott Beamer; Chen Sun; Yong-Jin Kwon; Ajay Joshi; Christopher Batten; Vladimir Stojanovic; Krste Asanovic
The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding increase in memory bandwidth. Projected scaling of electrical DRAM architectures appears unlikely to suffice, being constrained by processor and DRAM pin-bandwidth density and by total DRAM chip power, including off-chip signaling, cross-chip interconnect, and bank access energy. In this work, we redesign the DRAM main memory system using a proposed monolithically integrated silicon photonics technology and show that our photonically interconnected DRAM (PIDRAM) provides a promising solution to all of these issues. Photonics can provide high aggregate pin-bandwidth density through dense wavelength-division multiplexing. Photonic signaling provides energy-efficient communication, which we exploit to not only reduce chip-to-chip interconnect power but to also reduce cross-chip interconnect power by extending the photonic links deep into the actual PIDRAM chips. To complement these large improvements in interconnect bandwidth and power, we decrease the number of bits activated per bank to improve the energy efficiency of the PIDRAM banks themselves. Our most promising design point yields approximately a 10x power reduction for a single-chip PIDRAM channel with similar throughput and area as a projected future electrical-only DRAM. Finally, we propose optical power guiding as a new technique that allows a single PIDRAM chip design to be used efficiently in several multi-chip configurations that provide either increased aggregate capacity or bandwidth.
lasers and electro optics society meeting | 2009
Ajay Joshi; Christopher Batten; Yong-Jin Kwon; Scott Beamer; Imran Shamim; Krste Asanovic; Vladimir Stojanovic
We present a vertical integration approach for designing silicon photonic networks for communication in manycore systems. Using a top-down approach we project the photonic device requirements for a 64-tile system designed in 22 nm technology.
Archive | 2009
Scott Beamer; Chen Sun; Yong-Jin Kwon; Ajay Joshi; Christopher Batten; Vladimir Stojanovic; Krste Asanovic
IEEE | 2010
Vladimir Stojanovic; Ajay Joshi; Christopher Batten; Yong-Jin Kwon; Scott Beamer; S.C. Chen; Krste Asanovic
IEEE | 2010
Vladimir Stojanovic; Ajay Joshi; Christopher Batten; Yong-Jin Kwon; Scott Beamer; S.C. Chen; Krste Asanovic
IEEE | 2009
Vladimir Stojanovic; Krste Asanovic; Imran Shamim; Scott Beamer; Yong-Jin Kwon; Christopher Batten; Ajay Joshi
IEEE | 2009
Vladimir Stojanovic; Ajay Joshi; Christopher Batten; Yong-Jin Kwon; Krste Asanovic