Yoshinori Matsui

Memory module and memory system

Dynamic random access memory device with low-power consumption column selector

Memory module and memory device

Fuse circuit and redundant decoder

Bank selection for synchronous readable and writable semiconductor memory

Semiconductor memory including main and sub memory portions having plural memory cell groups and a bidirectional data transfer circuit

Memory modular and memory system

Semiconductor memory device for inputting and outputting data in a unit of bits

Semiconductor device having a latch circuit for latching data externally input

Single-chip synchronous dynamic random access memory (DRAM) system