Yoshinori Nakakubo

Effects of Plasma-Induced Si Recess Structure on n-MOSFET Performance Degradation

Performance degradation of n-MOSFETs with plasma-induced recess structure was investigated. The depth of Si recess (dR) was estimated from the experiments by using Ar gas plasmas. We propose an analytical model by assuming that the damage layer was formed during an offset spacer etch. A linear relationship between threshold voltage shift (DeltaV_th) and <i>d</i> _R was found. Device simulations were also performed for n-MOSFETs with various (d_R). Both |DeltaV_th| and off-state leakage current increased with an increase in <i>d</i> _R . The increase in |DeltaV_th| becomes larger for smaller gate length. The results from device simulations are consistent with the analytical model. These findings imply that the Si recess structure induced by plasma damage enhances V_th-variability in future devices.

Plasma-Induced Defect-Site Generation in Si Substrate and Its Impact on Performance Degradation in Scaled MOSFETs

Plasma-induced ion-bombardment damage was studied in terms of defect sites created underneath the exposed Si surface. From the shift of capacitance-voltage (C- V) curves, the defect sites were found to capture carriers (being negatively charged in the case of an Ar plasma exposure). This results in a change of the effective impurity-doping density and the profile. We also report that the defect density depends on the energy of ions from plasma. A simplified and quantitative model is proposed for the drain-current degradation induced by the series-resistance increase by the damage. The relationship derived between the defect density and the drain-current degradation is verified by device simulations. The proposed model is useful to predict the device performance change from plasma process parameters.

Optical and Electrical Characterization of Hydrogen-Plasma-Damaged Silicon Surface Structures and Its Impact on In-line Monitoring

Si surface damage induced by H2 plasmas was studied in detail by optical and electrical analyses. Spectroscopic ellipsometry (SE) revealed a decrease in the pseudo-extinction coefficient in the region of photon energy higher than ~3.4 eV upon H2-plasma exposure, which is attributed to the disordering of crystalline silicon (c-Si). The increase in in the lower energy region indicates the presence of trap sites for photogenerated carriers in the energy band gap in the E–k space of Si. The current–voltage (I–V) measurement of metal-contacted structures was performed, revealing the following characteristic structures: thinner surface (SiO2) and thicker interface (SiO2:c-Si) layers on the Si substrate in the case of H2-plasma exposure than those with Ar- and/or O2-plasma exposure. The structure assigned on the basis of both SE and I–V was further analyzed by a layer-by-layer wet-etching technique focusing on the removability of SiO2 and its etch rate. The residual damage-layer thickness for the H2-plasma process was thicker (~10 nm) than those for other plasma processes (<2 nm). Since the interface layer plays an important role in the optical assessment of the plasma-damage layer, the present findings imply that a conventional two-layer (SiO2/Si) optical model should be revised for in-line monitoring of H2-plasma damage.

Model for Bias Frequency Effects on Plasma-Damaged Layer Formation in Si Substrates

Bias frequency effects on damaged-layer formation during plasma processing were investigated. High-energy ion bombardment on Si substrates and subsequent damaged-layer formation are modeled on the basis of range theory. We propose a simplified model introducing a stopping power Sd(Eion) with a power-law dependence on the energy of incident ions (Eion). We applied this model to damaged-layer formation in plasma with an rf bias, where various energies of incident ions are expected. The ion energy distribution function (IEDF) was considered, and the distribution profile of defect sites was estimated. We found that, owing to the characteristic ion-energy-dependent stopping power Sd(Eion) and the straggling, the bias frequency effect was subject to suppression, i.e., the thickness of the damaged layer is a weak function of bias frequency. These predicted features were compared with experimental data on the damage created using an inductively coupled plasma reactor with two different bias frequencies; 13.56 MHz and 400 kHz. The model prediction showed good agreement with experimental observations of the samples exposed to plasmas with various bias configurations.

Structural and electrical characterization of HBr/O2 plasma damage to Si substrate

Silicon substrate damage caused by HBr/O2 plasma exposure was investigated by spectroscopic ellipsometry (SE), high-resolution Rutherford backscattering spectroscopy, and transmission electron microscopy. The damage caused by H2, Ar, and O2 plasma exposure was also compared to clarify the ion-species dependence. Although the damage basically consists of a surface oxidized layer and underlying dislocated Si, the damage structure strongly depends on the incident ion species, ion energy, and oxidation during air and plasma exposure. In the case of HBr/O2 plasma exposure, hydrogen generated the deep damaged layer (∼10 nm), whereas ion-enhanced diffusion of oxygen, supplied simultaneously by the plasma, caused the thick surface oxidation. In-line monitoring of damage thicknesses by SE, developed with an optimized optical model, showed that the SE can be used to precisely monitor damage thicknesses in mass production. Capacitance–voltage (C–V) characteristics of a damaged layer were studied before and after dil...

A new framework for performance prediction of advanced MOSFETs with plasma-induced recess structure and latent defect site

Plasma process-induced recess structure and the latent defect site density are quantitatively evaluated in detail by using optical and electrical methods combined with a classical molecular dynamics (MD) simulation. A new framework is proposed and demonstrated for predicting the relationship between plasma process parameters and MOSFET performance degradation.

Threshold Voltage Instability Induced by Plasma Process Damage in Advanced Metal–Oxide–Semiconductor Field-Effect Transistors

The effects of plasma process-induced physical damage on n-channel metal–oxide–semiconductor field-effect transistor (MOSFET) performance were investigated in detail in terms of threshold voltage (Vth) and Vth shift (ΔVth). The Si recess structure formed by ion bombardment was primarily focused on in this study. Defect site density was also considered as a possible cause of ΔVth. The damaged structure and damage formation mechanisms were studied using an optical analysis technique and classical molecular dynamics simulations. The plasma-induced ΔVth of devices with various recess depths was estimated by technology computer-aided design (TCAD) simulations, by taking into account the bias power dependence of damaged layer thickness. The Vth related to the recess structure shifts toward the negative direction in n-channel MOSFETs, indicating an increase in off-state leakage current (IOFF). |ΔVth| proportionally increases with the increasing recess depth dR (~ bias power), while the underlying defect density does not affect ΔVth. Moreover, the predicted Vth decrease (ΔVth<0) with an increase in dR strongly depends on gate length (Lg), i.e., the decrement in Vth is inversely proportional to Lg. This suggests that the dR increase induces an exponential increase in the standby power consumption of advanced devices. We provide a comprehensive relationship between device parameters (Vth, Ioff, and Lg) and process parameters for plasma-damaged devices.

Comprehensive Modeling of Threshold Voltage Variability Induced by Plasma Damage in Advanced Metal–Oxide–Semiconductor Field-Effect Transistors

Threshold voltage shift (ΔVth) and its variation induced by plasma processing were investigated in detail. Two damage mechanisms occurring in an inductively coupled plasma reactor were focused on in this study; the charging damage induced by the conduction current from plasma and the physical damage attributed to the bombardment of high-energy ions. Regarding the charging damage, ΔVth was found to show a power-law dependence on antenna ratio for both SiO2 and high-k gate dielectrics in metal–oxide–semiconductor field-effect transistors (MOSFETs). The observed dependence was also confirmed from the results of a constant-current stress test, indicating that the plasma plays the role of the current source in terms of the charging damage. As for the physical damage, the recess structure in source/drain extension regions was focused on as a possible cause of ΔVth. The depth of the recess (dR) formed by the physical damage was studied using Si wafers exposed to various plasma conditions and subsequently analyzed for surface damage. The recess depth determined from the experiments and classical molecular dynamics simulations exhibits a power-law dependence on potential drop across the sheath between the plasma and the device surface (Vp-Vdc), which is used as a practical measure of the damage. On the basis of the above results, ΔVth due to the physical damage was calculated by technology computer-aided design (TCAD) device simulation for n- and p-channel MOSFETs with the recess structure. ΔVth shows a linear dependence on recess depth for both n- and p-channel MOSFETs, resulting in the power-law dependence on (Vp-Vdc) via dR. These findings provide a simple relationship among the variations of ΔVth, antenna ratio, and plasma parameters. By taking into account the findings that the MOSFET with high-k dielectrics shows a larger ΔVth due to the charging than that with SiO2, and that the MOSFETs with a smaller gate length indicate a larger ΔVth due to the Si recess structure, we can conclude that larger amount of plasma damage induces the larger ΔVth variations, i.e., the Vth variability induced by the plasma damage is difficult to suppress and will become crucial to the fabrication of future advanced devices. The proposed relationship is useful as a guideline to suppress the ΔVth variations caused by plasma damage.

Atomistic simulations of plasma process-induced Si substrate damage - Effects of substrate bias-power frequency

Plasma-induced defect generation process in crystalline Si structure was simulated by classical molecular dynamics simulations. Energy distribution functions of Ar and Cl ions incident on the Si surface (IEDF) were implemented to predict the impacts on the defect generation processes in present-day plasma process equipments. The damaged-layer thickness was confirmed to be a weak function of IEDF, which are consistent with a binary-collision-based range model and experimental results. In the case of “fin-gate structure”, the simulation results predict that the sidewall may be damaged not by the incident angular distribution of ions but by the straggling of high-energy ions near the reaction surface, which leads to an on-current degradation of FinFETs.

Trade-Off Relationship between Si Recess and Defect Density Formed by Plasma-Induced Damage in Planar Metal–Oxide–Semiconductor Field-Effect Transistors and the Optimization Methodology

Physical damage induced by high-energy ion bombardment during plasma processing is characterized from the viewpoint of the relationship between surface-damaged layer (silicon loss) and defect site underneath the surface. Parameters for plasma-induced damage (PID), Si recess depth (dR) and residual (areal) defect density after wet-etch treatment (Ndam), are calculated on the basis of a modified range theory, and the trade-off relationship between dR and Ndam is presented. We also model their effects on device parameters such as off-state leakage (Ioff) and drain saturation current (Ion) of n-channel metal–oxide–semiconductor field effect transistors (MOSFETs). Based on the models, we clarify the relationship among plasma process parameters (ion energy and ion flux), dR, Ndam, Ioff, and Ion. Then we propose a methodology optimizing ion energy and ion flux under the constraints defined by device specifications Ioff and Ion, via dR and Ndam. This procedure is regarded as so-called optimization problems. The proposed methodology is applicable to optimizing plasma parameters that minimize degradation of MOSFET performance by PID.