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electronic components and technology conference | 2001

A new wafer-bonder of ultra-high precision using surface activated bonding (SAB) concept

Tadatomo Suga; M. M. R. Howlader; T. Itoh; C. Inaka; Yoshiyuki Arai; Akira Yamauchi

A robot-controlled wafer bonding machine was developed for the bonding of different sizes of wafers ranging up to 8 inches diameter. The features of this equipment are such that: (1) After the automatic parallel adjustment for 8-inch wafers to a margin of error within /spl plusmn/1 /spl mu/m, the X, Y, and /spl theta/ axis alignments are performed, allowing a margin of error within /spl plusmn/0.5 /spl mu/m in bonding accuracy; and (2) Room-temperature bonding is enabled using the surface activated (SAB) bonding concept. 8-inch diameter silicon wafers ware successfully bonded by the SAB process at room temperature for the first time. Preliminary investigations across the interface using an Infrared camera show that no bubbles are visibly present in the bonding region.


electronic components and technology conference | 2014

High throughput thermal compression NCF bonding

Toshihisa Nonaka; Yuta Kobayashi; Noboru Asahi; Shoichi Niizeki; Koichi Fujimaru; Yoshiyuki Arai; Toshifumi Takegami; Yoshinori Miyamoto; Masatsugu Nimura; Hiroyuki Niwa

High through put thermal compression NCF bonding was studied and the new process consisting of dividing pre and main bonding, and the multi die gang main bonding has been developed. The dividing could change the process from serial to parallel and enabled to use the constant heated bonder head, which eliminated the time consuming head cooling process of the conventional serial thermal compression bonding. The die of 7.3 × 7.3 × 0.1 mm size with bumps of 38 × 38 μm2 square Cu pillar covered by Sn-Ag cap, which had the pitches of 80 μm at peripheral and 300 μm at corer area, and the organic laminated substrate with Cu/OSP trace were used as the test vehicle in this study. Firstly, the dividing of pre and main bo ndi ng process in the case of si ngle die was investigated. The prebonding was the die placement to the NCF on the substrate, which was carried out at 150°C for 0.5 second. The substrate was kept at 80°C during the process. After the pre bonding the test vehicle was removed out from the equipment and cooled down to room temperature. And then it was mounted back to the equipment again and main bonding was carried out at 240°C for 20 seconds. The same substrate temperature as the pre bonding process was kept. Solder joint formation and NCF curing was made at the process. The assembled test vehicle was evaluated. The cross sectional observation results showed that the bump solder wetted the Cu trace on the substrate and no void was detected in the NCF by C-SAM observation. Secondly, the multi die main gang bonding was studied. The equipment was newly designed and built. 15 dies were pre bonded on the substrate with the same condition as that of the single die experiment. After the pre bonding was finished, the substrate was moved to the main gang bonder. During the transportation the substrate was cooled down to room temperature. The 15 dies were bonded at one time at 240°C for 10 seconds. The substrate was heated at 240°C during the process. The evaluation of the assembled dies revealed that the solder wettability of the joints and void detection in the NCF was almost the same as those of the single die pre and main divided bonding. This main bonding process time corresponded to 2700 UPH.


ieee international d systems integration conference | 2015

High productivity thermal compression bonding for 3D-IC

Noboru Asahi; Yoshinori Miyamoto; Masatsugu Nimura; Yoshihito Mizutani; Yoshiyuki Arai

The evaluation result of 4 layer stacked IC which was bonded using thermal compression bonder (TCB) is reported. The throughput can be remarkably improved because chips of multi-layer can be pre bonded by using non-conductive film (NCF) which is pre-applied adhesive and can be thermally pressed at a time. To realize this process, we stacked the 4 chips having through silicon via (TSV) on a Si substrate and evaluated the connectibility. As the evaluation after bonding, wettability of a solder by cross-section observation and a void in NCF layer by constant depth mode scanning acoustic microscope (C-SAM) observation were confirmed. As a result, it was confirmed that the voidless and good solder joints were possible by reducing the temperature difference in a stacking direction. For the evaluation, we used the TEG of 6 mm × 6 mm × 0.05 mm size which has more than 15,000 bumps of 12 μm height and 15 μm diameter. It was also demonstrated that gang bonding for a plurality of pre bonded chips formed on a substrate was possible by using the novel bonding attachment which accepts the thicknesses difference of 5 μm.


electronic components and technology conference | 2001

Analysis and measures against heat-expansion for sub-micron LD assembly by passive alignment

Akira Yamauchi; Yoshiyuki Arai

Currently, the conventional active alignment method is being gradually replaced by the passive alignment method, in which LD is bonded on silicon substrate with wave-guide. Transition to passive alignment was triggered by the drive for further cost reduction of optical device modules and demand for automated assembly operations. When applying the passive alignment method at the sub-micron level, the following points need to be considered. During heating operation, chip, substrate and heating tools are affected by thermal expansion. Position sift by temperature drift on recognition unit and bonding head also occur during processing. Therefore, the optimal operation cannot be achieved merely by raising recognition accuracy and alignment accuracy at the alignment table. Those conditions were carefully analyzed, and based on the following data, we have developed a unique calibration method using three cameras. The first camera is used to recognize the position of the chip before bonding. The second camera is used to recognize the position of the substrate before bonding. The third camera beneath the bonding stage is used to measure the displacement after bonding. By using those three cameras, placement accuracy of chip can be monitored, and any necessary data can be fed back, so as to maintain sub-micron accuracy throughout the processing. As a countermeasure against thermal expansion of chip, substrate and heating tools, a multi-layered ceramic heater and an air-floating head free of friction have been adopted, and the effects have been verified. This paper describes the data and the experiment to prove the methods described above, where successful sub-micron assembly was achieved.


international conference on electronic packaging and imaps all asia conference | 2015

Cu-Cu direct bonding technology using ultrasonic vibration for flip-chip interconnection

Yoshiyuki Arai; Masatsugu Nimura; Hajime Tomokage

In this study, we evaluated effects of both the oxygen density and aspect ratios of bumps which are the key elements on Cu-Cu bonding using ultrasonic vibration for flip-chip interconnection technology. We assumed that aspect ratios of bumps have conflicting characteristics against transmissibility of ultrasonic energy and bump deformation which is to absorb adjustment error of coplanarity (between the bonding head and the stage) of a bonding machine and variation of bump heights. We used TEG chips with different bump heights and conducted FEM analysis of bumps with different aspect ratios. Deformation amount in both longitudinal and lateral directions was calculated, done under the same loading condition as under the actual bonding operation, and, then, correlation of the calculated result with actual bonding performance, in short bondability was studied. Furthermore, in connection with an issue of oxidation which retards bonding, we investigated into the possible effect from difference of oxygen density by bonding in both air and nitrogen-blow environment. As a result of the overall study, we succeeded in bonding all of the 1,512 bumps in nitrogen-blow environment using 40 μm-high bumps.


Archive | 2001

Method and apparatus for mounting

Tadatomo Suga; Akira Yamauchi; Yoshiyuki Arai; Chisa Inaka


Archive | 2002

Chip mounting device

Akira Yamauchi; Yoshiyuki Arai


Archive | 2002

Method and apparatus for controlling attitude and connecting device using the apparatus

Yoshiyuki Arai; Chigusa Inaka; Akihiro Kanazawa; 千草 井中; 義之 新井; 明浩 金澤


Archive | 2001

Chip mounting device and callibration method therein

Yoshiyuki Arai; Akira Yamauchi


Archive | 1997

CHIP BONDING TOOL

Yoshiyuki Arai; Akira Yamauchi; 朗 山内; 義之 新井

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