Young-Ki Ko

Advanced TSV filling method with Sn alloy and its reliability

Low cost and high speed molten solder-filling process of through silicon via (TSV) for 3D packaging was investigated. Present filling methods, such as Cu electroplating and chemical vapor deposition (CVD), have some problems like low process speed and complicated process factors. In this study, molten solder was filled into the TSV without voids by using vacuum system. The thickness of wafer was 200 μm and the hole diameters were 20 and 30 μm respectively. TSVs were formed by deep reactive ion etching (DRIE) process. As the wetting layer, Ti and Au was sputtered on the wall of the TSVs. Vacuum pressure was ranged from 0.06 ~ 0.02MPa. In 0.02MPa condition, via was filled perfectly within only few seconds. To evaluate reliability of the filled TSV, thermal cycle test were carried out. And interface between TSV wall and filled Sn alloy was observed by focused ion beam (FIB).

High Speed TSV Filling Technology by using Molten Solder and Fabrication of Composite Solder as Filler Material

. 따라서 빠른 충진 시간을 갖는 충진 기술이 필요하며 빠른 충진 시간은 곧 생산성 증가로 연결되어 공정 비용을 낮추는 효과가 있다. 본 연구의 용융 솔더 충진 방법은 수초 이내의 짧은 시간내에 결함 없는 비아 충진이 가능한 방법이다. 웨이퍼 양단의 압력차를 이용하여 용융 솔더를 충진하는 방법으로 TSV 직경의 변화가 있더라도 압력만을 제어하여 빠른 충진이 가능하다는 장점을 가지고 있다. 또한 본 연구의 또 다른 이슈로 낮은 열팽창계수를 가지는 충진소재를 연구하였다. 기존의 TSV내에 충진된 Cu는 Si과의 열팽창계수 차이에 따라 Cu와 Si 간의 계면에 높은 Stress가 발생하게 된다. 이러한 Stress는 Cu의 Pop-up현상 및 Crack, Void 발생 등의 문제와 Si내의 Stress는 device의 성능저하를 일으키는 원인이 된다

Advanced solder TSV filling technology developed with vacuum and wave soldering

This research investigated advanced filling technology, different from existing technologies, for the purpose of 3D layering on electronic circuits. Filling with molten solder causes a pressure difference between the upper and lower part of the wafer, to overcome surface tension of the through via holes, and then due to pressure difference molten solder is filled into the TSV. The wafer thickness was 100–200μm with holes of diameter 20∼30μm. The TSVs were formed by deep reactive ion etching (DRIE). A wetting layer of Ti/Cu or Au was sputtered on the wall of the TSVs. Due to pressure differences between upper and lower parts, the molten solder filled into the Through Silicon Via (TSV). Vacuum Pressure was between 0.02MPa and 0.08MPa. The filling speed was under 3 seconds, much higher than conventional methods. Cross-sectional micrographs were taken with a field emission second electron microscope (FE-SEM).

High Speed and Low Cost TSV Filling Technology by Using Molten Solder

. 이러한 장점은 지금까지 개발되어 온 3D 적층기술 중에서 TSV가 차세대 전자산업의 다양한 요구를 충족할 수 있는 기술로 부각되는 이유이다. 그러나 TSV의 높은 종횡비와 초미세 직경 등 구조적인 문제로 도전성 물질의 충진에는 높은 제조 공정비용이 소요되고 이는 상업화에 대한 가장 큰 저해 요소이다. TSV의 제조공정은 비아(via)형성, 절연층 및 확산방지층 형성, 비아 충진(via filling), 칩 접합(bonding)으로 나눌 수 있는데 각 세부공정 중 비아 충진 공정은 전체 TSV 제조 공정 중 약 40%이상의 가장 높은 비용을 차지하고 있다

SiC-NANOPARTICLE DISPERSED COMPOSITE SOLDER BUMPS FABRICATED BY ELECTROPLATING

SiC-mixed Sn–58Bi composite solder bumps were successfully fabricated via an electroplating process. For the composite solder bump fabrication, ultrasonically dispersed SiC nanoparticles were added to the plating solutions. DSC analysis indicated that the melting temperature of SiC-mixed Sn–58Bi solders was the same as that of the non-mixed Sn–58Bi. Shear strengths of Sn–58Bi+SiC solder bumps were 6% higher than that of non-mixed solder bumps. The thicknesses of intermetallic compound were almost the same for both Sn–58Bi and Sn–58Bi+SiC samples. The Sn–58Bi+SiC composite solder bumps had finer lamellar structures than non-mixed Sn–58Bi. From the fracture surface analysis, fracture occurred at solder bump matrix, not at joint interface. Therefore, the addition of the SiC nanoparticles in the Sn–58Bi solders decreased the grain sizes, which increased the shear strengths.