Youngwoo Park

PFFS: a scalable flash memory file system for the hybrid architecture of phase-change RAM and NAND flash

In this paper, we present the scalable and efficient flash file system using the combination of NAND and Phase-change RAM (PRAM). Until now, several flash file systems have been developed considering the physical characteristics of NAND flash. However, previous flash file systems still have a high performance overhead and a scalability problem of the mounting time and the memory usage because, in most case, the metadata is written with several words at a single update even though the writes in NAND flash must be performed in terms of page, which is typically 2 KiB. The proposed flash file system called PFFS uses PRAM to mitigate the limitation of NAND flash. The PRAM is a next generation non-volatile memory and good for dealing with word level read/write of a small size of data. PFFS hence separates the metadata from the regular data in a file system and saves them into PRAM. Consequently, the PFFS manages all the files and directories in the PRAM and outperforms other flash file systems. The experimental results show that the performance of PFFS is 25% better than YAFFS2 for small-file writes while matching YAFFS2 performance for large writes and the mouting time and the memory usage of PFFS are O(1).

Efficient page caching algorithm with prediction and migration for a hybrid main memory

Emerging next generation memories, NVRAMs, such as Phase-change RAM (PRAM), Ferroelectric RAM (FRAM), and Magnetic RAM (MRAM) are rapidly becoming promising candidates for large scale main memory because of their high density and low power consumption. Many researchers have attempted to construct a main memory with NVRAMs, in order to make up for the limits of NVRAMs. However, we find that the preexisting page caching algorithms, such as LRU, LIRS, and CLOCK-Pro, are often sub-optimal for NVRAMs due to its DRAM-oriented design including uniform access latency and unlimited endurance. Consequently, the algorithms cannot be directly adapted to the hybrid main memory architecture with PRAM. To mitigate this design limitation, we propose a new page caching algorithm for the hybrid main memory. It is designed to overcome the long latency and low endurance of PRAM. On the basis of the LRU replacement algorithm, we propose a prediction of page access pattern and migration schemes to maintain write-bound access pages to DRAM. The experiment results have convinced us that our page caching algorithm minimizes the number of the write access of PRAM while maintaining the cache hit ratio. The results show that we can reduce the total write access count by a maximum of 52.9% and the consumed energy by 19.9%. Therefore, we can enhance the average page cache performance and reduce the endurance problem in the hybrid main memory.

High-Performance Scalable Flash File System Using Virtual Metadata Storage with Phase-Change RAM

Several flash file systems have been developed based on the physical characteristics of NAND flash memory. However, previous flash file systems have performance overhead and scalability problems caused by metadata management in NAND flash memory. In this paper, we present a flash file system called PFFS2. PFFS2 stores all metadata into virtual metadata storage, which employs Phase-change RAM (PRAM). PRAM is a next-generation nonvolatile memory and will be good for dealing with word-level read/write of small-size data. Based on the virtual metadata storage, PFFS2 can manage metadata in a virtually fixed location and through byte-level in-place updates. Therefore, the performance of PFFS2 is 38 percent better than YAFFS2 for small file read/write while matching YAFFS2 performance for large file. Virtual metadata storage is particularly effective in decreasing the burden of computational and I/O overhead of garbage collection. In addition, PFFS2 maintains a 0.18 second mounting time and 284 KB memory usage in spite of increases in NAND flash memory size. We also propose a wear-leveling solution for PRAM in virtual metadata storage and greatly reduce the total write count of NAND flash memory. In addition, the life span of PFFS2 is longer than other flash file systems.

Migration based page caching algorithm for a hybrid main memory of DRAM and PRAM

As the DRAM based main memory significantly increases the power and cost budget of a computer system, new memory technologies such as Phase-change RAM (PRAM), Ferroelectric RAM (FRAM), and Magnetic RAM (MRAM) have been proposed to replace the DRAM. Among these memories, PRAM is the most promising candidate for large scale main memory because of its high density and low power consumption. In previous researches, a hybrid main memory approach of DRAM and PRAM is adopted to make up for the latency and endurance limits of PRAM. On the other hand, large amount of a main memory is used for page cache to hide disk access latency. Many page caching algorithms such as LRU, LIRS, and CLOCK-Pro are developed and show good performance, but these are only consider the main memory with uniform access latency and unlimited endurance. They cannot be directly adapted to the hybrid main memory architecture with PRAM. In this paper, we propose a new page caching algorithm for the hybrid main memory. It is designed to overcome the long latency and low endurance of PRAM. On the basis of the LRU replacement algorithm, we propose page monitoring and migration schemes to keep read-bound access pages to PRAM. The experiment results show that our page caching algorithm minimize the write access of PRAM while maintaining cache hit ratio. The results show that we can maximally reduce the total write access count by 48.4%. Therefore, we can enhance the average page cache performance and reduce the endurance problem in the hybrid main memory.

CheekTouch: an affective interaction technique while speaking on the mobile phone

We present a new affective interaction technique, called CheekTouch, by combining tactile feedback, delivered through the cheek, and multi-finger input, while speaking on the mobile phone. We designed a prototype by using a multi-touch mobile device and a 4x3 vibrotactile display device. We identified six affective touch behaviors (pinching, stroking, patting, slapping, kissing and tickling) that can be exchanged through one anothers cheeks while speaking on the phone. We mapped the affective touch behaviors on tactile feedback expressions of the vibrotactile display. Results of a preliminary user study suggest that our technique is positively evaluated by the participants and applicable to intimate and emotional communication.

Wrigglo: shape-changing peripheral for interpersonal mobile communication

We introduce Wrigglo, a shape-changing smart phone peripheral that allows pairs of users to share wriggling movements with one another. Attached to a smart phone, Wrigglo captures the senders motions and activates the receivers Wrigglo which repeats the motion simultaneously. The result of our in-lab use observation with twelve couples showed that Wrigglo supported emotional and functional roles of body gestures and postures, creating vocabularies related to the motion of specific body parts and, to some extent, reflected the connected users presence through the devices movement. Through its peripheral anthropomorphization, Wrigglo can deliver new forms of telepresence by embodied posturing and gesturing in mobile communication.

How do couples use CheekTouch over phone calls

In this paper we introduce CheekTouch, an affective audio-tactile communication technique that transmits multi-finger touch gestures applied on a senders mobile phone to a receivers cheek in real time during a call. We made a pair of CheekTouch prototypes each with a multi-touch screen and vibrotactile display to enable bidirectional touch delivery. We observed four romantic couples in their twenties using our prototype system in a lab setting over five consecutive days, and analyzed how CheekTouch affected their non-verbal and emotional communication. The results of the user study showed that CheekTouch could effectively support audio-tactile communication in various ways - persuading, conveying status, delivering information, emphasizing emotion/words, calling for attention, and being playful.

The Trial of Bendi in a Coffeehouse: Use of a Shape-Changing Device for a Tactile-Visual Phone Conversation

We present Bendi, a shape-changing device for a tactile-visual phone conversation. Bendi enables users to deliver shape-changing movements (e.g., upward or downward bending, left or right tilting, and shrinking) from the users joystick input to the other partys device in real time during phone conversations. We conducted a user study to observe how seven couples used it over three days in a coffeehouse. Our field trial of Bendi in a coffeehouse showed the private and natural uses, and integrated uses of tactile and visual expressions along with the uses of the vocabularies developed through Bendi. In addition, there were active uses even in negative and serious conversational context with its pleasant tactile feelings and movement representations. Lastly, we discuss issues for the future designs and real-world deployment of shape-changing mobile devices for daily use.

CAVE: channel-aware buffer management scheme for solid state disk

Exploiting a multi-channel architecture of Solid State Disk (SSD) is a role of Flash Translation Layer (FTL) until now. A multi-channel FTL scheme increases I/O parallelism by spreading out pages in a logical block to multiple channels. However, this scheme has high garbage collection overhead for reclaiming invalid pages, thus resulting in the performance degradation. In order to overcome this problem, we assign a write buffer to exploit a multi-channel architecture. In this paper, we propose a novel buffer management scheme, called Channel-Aware Victim Eviction (CAVE). The key idea of the CAVE scheme is to evict multiple victims whose number is equal to the number of NAND flash memories when a write buffer is full for increasing I/O parallelism. Because a write buffer exploits a multi-channel architecture, we can use a 1-channel FTL scheme, thus reducing garbage collection overhead. We develop a trace-driven simulator for evaluating the CAVE scheme. The hit ratio and execution time are used as performance metrics. In the hit ratio, the CAVE scheme can achieve a similar result with a conventional method which uses a multi-channel FTL scheme though it evicts more victims at a time. In the execution time which consists of the write time and garbage collection time, a result shows that the CAVE scheme can reduce it by 55.5% - 97.4% in block-level LRU using SYSMARK compared to the conventional method.

A hybrid flash translation layer with adaptive merge for SSDs

The Flash Translation Layer (FTL) in Solid-State Disks (SSDs) maps logical addresses to physical addresses for disk drive virtualization. In order to reduce garbage collection overhead, we propose full associative striped block-level mapping. In addition, an adaptive merge is proposed to avoid excessive data block reconstructions during garbage collection. With these mechanisms, the write latency is improved up to 78% in comparison with the previous multichannel hybrid FTLs in a sample PC trace. The performance improvements stem from 52% reduced garbage collection.