Yu-cheng Liu

Error Correction in Redundant Residue Number Systems

Two error-correcting algorithms for redundant residue number systems are presented, one for single residue-error correction and the other for burst residue-error correction. Neither algorithm requires table lookup, and hence their implementation needs a memory space which is much smaller than that required by existing methods. Furthermore, the conditions which the moduli of the redundant residue number systems must satisfy for single residue-error correction are less restrictive than that of existing methods. Comparison of the approach on which these two algorithms are based and that of existing methods is given.

Effective Memory Bandwidth and Processor Blocking Probability in Multiple-Bus Systems

This correspondence presents two expressions in calculating effective memory bandwidth for a wide range of multiple-bus configurations. Also presented is an analytical solution for determining each processors blocking probability in a multiple-bus system where different priorities are assigned to the processors.

Performance model for a prioritized multiple-bus multiprocessor system

The performance of a shared memory multiprocessor system with a multiple-bus interconnection network is studied in this paper. The effect of bus and memory contention is modeled using a probabilistic model and a closed form solution for the acceptance probability of each processor is presented. It is assumed that each processor in the system has a distinct priority assigned to it and that arbitration is based on priority. Whenever a request from a processor is rejected due to bus or memory conflicts, the request is resubmitted until granted. Based on the model, individual processor acceptance probabilities are first estimated, from which the effective memory bandwidth is computed. The accuracy of the analytical model is verified based on simulation results. Results from the model are compared against other approximate models previously reported in literature. It is observed that the inaccuracy of the model measured in terms of error from simulation results is less than that in previously reported studies.

Analysis of prioritized crossbar multiprocessor systems

Abstract This paper analyzes the performance of crossbar multiprocessor systems under the assumption that processors are organized in a priority hierarchy. A basic model is derived for estimating the probability of acceptance of a memory request for each individual processor with a different priority. Improvements are made by using an adjusted memory request rate. Analytical results are validated by comparison with simulation data for configurations up to 64 X 64 with request rate ⩽ 1. Finally, it is shown that the effective memory bandwidth can be calculated accurately from acceptance probabilities of individual processors.

On decoding of maximum-distance separable linear codes

In this paper, some properties of maximum-distance separable linear codes are presented. Based on these properties, a decoding algorithm for correcting random errors is established. A simpler decoding algorithm for correcting burst errors is also given. Applying these decoding algorithms to known classes of maximum-distance separable linear codes, the amount of hardware required for implementation is only a small fraction of those required by the existing decoding algorithms.

Temporal associative memory with finite internal states

A new class of temporal associative neural network, called finite state network (FSN), is presented. Unlike other temporal networks, the proposed FSN has the desirable feature that it can associate any input temporal pattern with any output temporal pattern. A temporal pattern is represented by a symbol string, and each symbol is a bipolar vector. The FSN is trained on input-output exemplar string pairs. The FSN is always capable of learning new exemplar pairs while retaining all trained pairs unchanged. Suppose that the FSN has been trained on exemplar pairs (/spl alpha//sub 1/, /spl theta//sub 1/), (/spl alpha//sub 2/, /spl theta//sub 2/), ..., (/spl alpha//sub p/, /spl theta//sub p/), each time the FSN receives an input string /spl alpha/, it will compare /spl alpha/ with each of /spl alpha//sub 1/, /spl alpha//sub 2/,..., /spl alpha//sub p/ and find out the closest one, denoted by /spl alpha//sub k/. Then the FSN will respond with the corresponding /spl theta//sub k/ as its output. Training the FSN on an exemplar string pair (/spl alpha/, /spl theta/) is a one-passing process and it adds (/spl alpha/, /spl theta/) to the FSNs memory. This paper describes the structure of the FSN which consists of three subnets, one for input, one for state representation and one for output. A process is given to train the network by adjusting all adaptive weights associated with the three subnets. Implementation and training of the FSN are validated using simulation and test results are given.<<ETX>>

Design and implementation of an EPROM emulator as a low-cost microprocessor development tool

This paper describes the design and use of an EPROM emulator as a low-cost microprocessordevelopment tool. In conjunction with cross assemblers and linkers, it allows executable code to be developed using a host PC, and to be directly executed by the target system. Unlike a microprocessor emulator, the EPROM emulator is flexible in that it can serve as a development tool for target systems based on a variety of microprocessors.

Error correction in redundant residue number systems

Two error-correcting algorithms for redundant residue number systems are presented, one for single residue-error correction and the other for burst residue-error correction. Neither algorithm requires table lookup, and hence their implementation needs a memory space which is much smaller than that required by existing methods. Furthermore, the conditions which the moduli of the redundant residue number systems must satisfy for single residue-error correction are less restrictive than that of existing methods. Comparison of the approach on which these two algorithms are based and that of existing methods is given.