Yuji Sugino

Thermal stress analysis of silicon bulk single crystal during Czochralski growth

Abstract The thermal stress analysis of a silicon bulk single crystal with a diameter of 6 or 8 inches is performed in the cases of the [001] and [111] pulling directions by using a three-dimensional finite element program developed for calculating thermal stress in a bulk single crystal during the Czochralski growth. Elastic anisotropy and temperature dependence of material properties are taken into account in this program. The temperature distribution and shape of a silicon bulk single crystal which are required for the thermal stress analysis are obtained from a computer program for a transient heat conduction analysis which is specialized for the Czochralski growth. The stress components obtained from the thermal stress analysis are converted into the parameters related with dislocation density. The time variations of these parameters are shown in this paper. The relation between these parameters and the shape of the crystal-melt interface is discussed.

Excellence of Gate Oxide Integrity in Metal-Oxide-Semiconductor Large-Scale-Integrated Circuits Based on P-/P- Thin-Film Epitaxial Silicon Wafers

The substitution of Czochralski (CZ)-silicon (Si) wafers into p-(n-)/p-(n-) ( p- or n- layer on p- or n- Si substrate: resistivity of approximately 100 m Ω m) thin-film epitaxial Si wafers used as starting materials has been investigated with respect to application to metal-oxide-semiconductor (MOS) large-scale-integrated circuits (LSIs). The optimum epitaxial layer ( p-/p- structure) thickness for MOS-LSIs was determined to be approximately 1 µ m from the viewpoints of gate oxide integrity (GOI) improvement and cost effectiveness. With increasing epitaxial layer thickness from 0.1 to 0.3 µ m, the oxide defect density was greatly reduced and leveled off at approximately 1/30 that of a CZ-Si layer if the layer thickness is above 0.3 µ m. This is because microdefects in CZ-Si represented by crystal originated particles (COP) which cause weak spots in the gate oxide layer are covered by an excellent Si epitaxial layer on the CZ-Si surface. The p-/p- thin epitaxial structure results in very controlled resistivity for electrically active regions in the device, resulting in a lower cost of growth.

Dependence of Warpage of Czochralski-Grown Silicon Wafers on Oxygen Concentration and Its Application to MOS Image-Sensor Device

The resistance of precipitation-treated Czochralski-grown silicon wafers to warpage has been investigated using crystals containing oxygen at a concentration of 5.5-12.3×1017 atoms/cm3. The precipitation softening is effectively suppressed if the oxygen concentration is lower than a threshold value of about 8×1017 atoms/cm3. In wafers with oxygen concentrations of 5.5-8×1017 atoms/cm3, oxygen precipitation proceeds slowly, resulting in slow growth of bulk stacking faults and few dislocation sources. In MOS image-sensor devices, the wafers with such oxygen concentrations have few crystal defects within the area of the photodiodes after processing, which cause the fatal failure of white blemishes detected as white scratches on output pictures.