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Featured researches published by Yutaka Okamoto.


The Japan Society of Applied Physics | 1996

Advanced Ti Salicide Technology for High Performance Quarter-Micron Logic LSIs

Jun Suenaga; Hirofumi Sumi; Kazuhiro Tajima; Atsushi Horiuchi; Michihiro Kanno; Yutaka Okamoto

An advanced Ti salicide technology is proposed for high performance quater-micron logic LSIs. A new salici& pmcess nsned ESPAD @nhanced Silici.l,tion with Pre-Artorphization using Drect ion implantation) in combination with an optimum RTP (Rapid Thermal Promsing) and fumace annealing has been developed The fonired TiSi is able to maintain low sheet rcsistmce even in nanrow (0.2 4 m) S/D region to achieve minimuin basic cell size and low junction leakage cunent. High performance logic LSIs with low stand-by cunent are fabricated using this t€.hnology.


Archive | 1990

Method of manufacturing mis semiconductor device

Shinichi Ito; Naoya Noshi; Yutaka Okamoto


Archive | 1994

Method of fabricating complementary semiconductor device

Yutaka Okamoto


Archive | 1997

Process of fabricating semiconductor device

Hirofumi Sumi; Jun Suenaga; Kazuhiro Tajima; Yutaka Okamoto; Atsushi Horiuchi


Archive | 1995

Method of producing semiconductor device

Yutaka Okamoto


Archive | 1993

Static random access memory cell structure having a thin film transistor load

Yutaka Okamoto


Archive | 1998

Method of making diffused layer resistors for semiconductor devices

Yutaka Okamoto


Archive | 2001

Static RAM with improved memory cell pattern

Minoru Ishida; Yutaka Okamoto


Archive | 1996

Method of manufacturing a static random access memory device including a coupling capacitor between a pair of storage nodes

Yutaka Okamoto


Technical report of IEICE. ICD | 1999

Uniform and Thermally Stable Co Salicide Formation for Sub-Quarter-micron Dual-Gate CMOS Devices

Hirofumi Sumi; Jun Suenaga; Yutaka Okamoto

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