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Dive into the research topics where Yuto Nakano is active.

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Featured researches published by Yuto Nakano.


workshop in information security theory and practice | 2014

A Pre-processing Composition for Secret Key Recovery on Android Smartphone

Yuto Nakano; Youssef Souissi; Robert Nguyen; Laurent Sauvage; Jean-Luc Danger; Sylvain Guilley; Shinsaku Kiyomoto; Yutaka Miyake

Simple Side-Channel Analyses (SSCA) are known as techniques to uncover a cryptographic secret from one single spied waveform. Up to now, these very powerful attacks have been illustrated on simple devices which leakage was obvious. On more advanced targets, such as high-end processors of smartphones, a simple visual analysis of the waveforms might not be sufficient to read the secret at once. In this paper, we detail and explain how a composition of time-frequency pre-processings manages to extract the relevant information from one signal capture of an asymmetric cryptographic operation (RSA and ECC) running on an Android system. The lesson is that side-channel countermeasures must be applied even on advanced platforms such as smartphones to prevent secret information theft through the electromagnetic (EM) waveforms.


smart card research and advanced application conference | 2012

Memory access pattern protection for resource-constrained devices

Yuto Nakano; Carlos Cid; Shinsaku Kiyomoto; Yutaka Miyake

We propose a practice-oriented scheme for protecting RAM access pattern. We first consider an instance which relies on the use of a secure (trusted) hardware buffer; it achieves both security and performance levels acceptable in practice by adapting ideas from oblivious RAM mechanisms, yet without the expensive (re-)shuffling of buffers. Another instance requires no special hardware, but as a result leads to a higher, yet practical overhead. One of the main features of the proposal is to maintain the history of memory access to help hiding the access pattern. We claim that under reasonable assumptions, the first scheme with trusted memory is secure with overhead of only 6 ×, as is the second scheme with overhead of (2m+2lh+2) × where m and lh are respectively the size of the buffer and history. We note that although the proposal is particularly focused on the software execution protection environment, its security may well be appropriate for most uses in the remote storage environment, to prevent access pattern leakage of cloud storage with much lower performance overhead than existing solutions.


applied cryptography and network security | 2011

Analysis of message injection in stream cipher-based hash functions

Yuto Nakano; Carlos Cid; Kazuhide Fukushima; Shinsaku Kiyomoto

A common approach for the construction of cryptographic hash functions is to design the algorithm based on an existing symmetric encryption primitive. While there has been extensive research on the design of block cipher-based hash functions, little has been done on the study of design and security of stream cipher-based hash functions (SCH). In this paper we discuss the general construction of stream cipherbased hash functions, devoting special attention to one of the functions crucial components: the message injection function. We define two types of message injection functions, which may be appended to the keystream generator (e.g. a stream cipher) to build an SCH. Based on these constructions, we evaluate the security of simple SCHs whose stream cipher function consists of a LFSR-based filter generator. We see this as an initial step in the more formal study of the security of hash function constructions based on stream ciphers.


international conference on information security | 2011

MASHA: low cost authentication with a new stream cipher

Shinsaku Kiyomoto; Matthew Henricksen; Wun-She Yap; Yuto Nakano; Kazuhide Fukushima

In this paper, we propose a new high-speed stream cipher called MASHA (Message Authenticated Streaming-encryption Heterogeneous Algorithm) with integrated MAC functionality. It simultaneously encrypts plaintext and produces an authentication tag that assures data and origin integrity. On the Intel Core 2, its speed is 11.92 cycles/byte, which is faster than the time it takes to encrypt and authenticate using well-known primitives SNOW 2.0 and SHA-256 in conjunction. We show that MASHA is secure against all known attacks.


the internet of things | 2018

An Evaluation Framework for Fastest Oblivious RAM

Seira Hidano; Yuto Nakano; Shinsaku Kiyomoto

Oblivious RAM (ORAM) is security provable approach for memory access pattern hiding. However, since ORAM incurs high computational overheads due to repeated shuffles of data blocks in a memory, numerous constructions have been proposed to reduce it. While the computational cost has been improved by these constructions as compared to early ones, it is still expensive from the practical point of view. Specifically, in its application to IoT devices, less computational cost is expected for avoiding high energy consumption. We thus focus on an ORAM construction proposed by Nakano et al. in 2012, which we call the fastest ORAM. The computational cost of this construction is much less than any other conventional ORAM constructions. However, the security has not been analyzed sufficiently, due to the lack of practical security definitions. Therefore, we formulate a new security definition for the fastest ORAM on the basis of the average minentropy, and propose a framework for evaluating the security.


trust, security and privacy in computing and communications | 2016

Delay PUF Assessment Method Based on Side-Channel and Modeling Analyzes: The Final Piece of All-in-One Assessment Methodology

Kazuhide Fukushima; Youssef Souissiy; Seira Hidano; Robert Nguyeny; Jean-Luc Dangery; Sylvain Guilleyy; Yuto Nakano; Shinsaku Kiyomoto; Laurent Sauvage

Most of the recent literature investigates mathematical analyses performed on the simulated behavior of the delay physically unclonable function (PUF). These analyses are not sufficient to characterize the PUF leakage under actual operating conditions, and it is hard to model the distribution of the noise that might confuse the assessment of the PUF. Furthermore, simulated analyses may lead to an overestimation of the risk. We show that the availability of an embedded image of the target PUF is important for assessing security against real attacks by considering different input conditions. In this paper, we propose a delay PUF assessment method that combines side-channel analyses and modeling analyses. Our proposed method is the last piece of the all-in-one methodology to assess the security of the delay PUF. Finally, we conduct an experiment to evaluate a real arbiter-PUF (APUF) with our proposed assessment method. Our result shows that a modeling analysis using random forest (RF) and advanced support vector machine (SVM) are suitable for the APUF in the assessment method.


international conference on security and cryptography | 2014

A multiple-server efficient reusable proof of data possesion from private information retrieval techniques

Juan Camilo Corena; Anirban Basu; Yuto Nakano; Shinsaku Kiyomoto; Yutaka Miyake

A proof of Data Possession (PDP) allows a client to verify that a remote server is still in possession of a file entrusted to it. One way to design a PDP, is to compute a function depending on a secret and the file. Then, during the verification stage, the client reveals the secret input to the server who recomputes the function and sends the output back to the client. The client can then compare both values to determine if the server is still in possession of the file. The problem with this approach is that once the server knows the secret, it is not useful anymore. In this article, we present two PDP schemes inspired in Multiple-Server Private Information Retrieval (MSPIR) protocols. In a traditional MSPIR protocol, the goal is to retrieve a given block of the file from a group of servers storing identical copies of it, without telling the servers what block was retrieved. In contrast, our goal is to let servers evaluate a function using an input that is not revealed to them. We show that our constructions are secure, practical and that they can complement existing approaches in storage architectures using multiple cloud providers. The amount of transmitted information during the verification stage of the protocols is proportional to the square root of the length of the file.


conference on risks and security of internet and systems | 2014

Key Extraction Attack Using Statistical Analysis of Memory Dump Data

Yuto Nakano; Anirban Basu; Shinsaku Kiyomoto; Yutaka Miyake

During the execution of a program the keys for encryption algorithms are in the random access memory (RAM) of the machine. Technically, it is easy to extract the keys from a dumped image of the memory. However, not many examples of such key extractions exist, especially during program execution. In this paper, we present a key extraction technique and confirm its effectiveness by implementing the Process Peeping Tool (PPT) – an analysis tool – that can dump the memory during the execution of a target program and help the attacker deduce the encryption keys through statistical analysis of the memory contents. Utilising this tool, we evaluate the security of two sample programs, which are built on top of the well-known OpenSSL library. Our experiments show that we can extract both the private key of the RSA asymmetric cipher as well as the secret key of the AES block cipher.


international workshop constructive side-channel analysis and secure design | 2013

Chosen-IV correlation power analysis on KCipher-2 and a countermeasure

Takafumi Hibiki; Naofumi Homma; Yuto Nakano; Kazuhide Fukushima; Shinsaku Kiyomoto; Yutaka Miyake; Takafumi Aoki

This paper presents a chosen-IV (Initial Vector) correlation power analysis on the international standard stream cipher KCipher-2 together with an effective countermeasure. First, we describe a power analysis technique which can reveal the secret key (initial key) of KCipher-2 and then evaluate the validity of the CPA with an experiment on an FPGA platform. This paper also proposes a countermeasure based on random masking techniques. The concept of the proposed countermeasure is to mask intermediate data which pass through the non-linear function part including integer addition, substitution functions, and internal registers L1 and L2. We design two types of masked integer adders and two types of masked substitution circuits in order to minimize circuit area and delay. The performance of the proposed method is evaluated through ASIC implementations on a 90-nm CMOS technology. In comparison to the design without a countermeasure, the circuit area and delay of the design with a countermeasure increase at most 1.5 and 2.6 times, respectively. The effectiveness of the countermeasure is also demonstrated through an experiment on the same FPGA platform.


international conference on e business | 2010

Stream Cipher-Based Hash Function and Its Security

Yuto Nakano; Jun Kurihara; Shinsaku Kiyomoto; Toshiaki Tanaka

Stream cipher-based hash function (SCH) is the one of new approachs to construct hash functions. However, the security and the design policy of SCH have not yet been studied sufficiently. In this paper, we analyze the security of SCHs focusing on the stream cipher function. First, we propose a model of SCHs which consist of a pre-computation function and a stream cipher. Then, we show that attacks against a stream cipher can also be threats to SCHs and discuss the security on each phase of SCH; message injection, blank rounds, and hash generation. Finally we derive the necessary conditions on the stream cipher function for an SCH to be secure.

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Toshiaki Tanaka

Sapporo Medical University

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Jun Kurihara

Tokyo Institute of Technology

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