Yves Lembeye

Current Sharing Between Parallel Turns of a Planar Transformer: Prediction and Improvement Using a Circuit Simulation Software

As a consequence of the increase of power needs in low-voltage applications, wiring several windings in parallel to sustain large currents has become common. This choice may have a serious impact on the transformer reliability. In practice, due to additional currents that we call “circulation currents,” highly localized extra losses occur. Although hot points resulting from these currents can destroy the component, the related losses are generally not taken into account by analytical approaches. In planar transformers, windings are made of printed circuit board layers, and circulation currents lead to severe unbalance of current sharing between parallel layers. This paper presents an analytical method enabling the evaluation of the currents in every layer using only a circuit simulation software such as Pspice or PSIM. For a designer, this method is very intuitive and fast compared with the use of finite element method simulations. Several extensions of the modeling method used here are also presented.

Autonomous, Low Voltage, High Efficiency, CMOS Rectifier for Three-Phase Micro Generators

The paper reports on the design, fabrication and testing of a fully integrated, low voltage rectifier for three-phase micro-generators. Focus is applied to the design of a stand-alone rectifier for three-phase AC inputs in the range of 1-3.3 V, 5-500 mA at 10-100 kHz. Specific low powering issues such as low-voltage rectification, self-powering, automatic start-up and anti-parasitic protection are clearly presented. These issues have been solved thanks to original designs and concepts realized using CMOS 0.35 mum technology. The measurements on the fabricated mu-rectifier coupled to a three-phase micro-generator indicate its full functionality and high conversion efficiency, up to 90 %.

Design and Realization of Highly Integrated Isolated DC/DC Microconverter

This paper deals with the design and the realization of an integrated isolated HF dc-to-dc converter for low-voltage and low-power conditioning applications (3.3 V and 1 W) including galvanic isolation. It is based on the 3-D integration of several elementary silicon dies in which essential components such as the inverter, the rectifier, the HF transformer, the input and output capacitors, and the output inductor have been integrated. The paper deals with the silicon integration of all these elements, with the presentation of our work being related with the state of the art. Then, it focuses on an estimate of the whole converter functional performance at 1-MHz switching frequency. Practical but partial implementation was carried out. The inverter and the rectifier are designed in CMOS technology (Austria Micro Systems 0.35 μm) and have been optimized to operate at HF (1 MHz) to reduce the size of passive devices. We have monolithically integrated all that is necessary for this function. The transformer, as well as the inductor and the capacitors, is also integrated on separate silicon dies. Their integration is discussed, as well as their design and practical characterization. Based on a distributed construction, the overall converter efficiency is estimated in simulation based on practical characterizations. It appears that correct efficiency with a reasonable silicon surface and volume can be reached.

Voltage balancing converter network for series-connected battery stack

Energy storage systems are critical elements in electric vehicle (EV) and hybrid electric vehicle (HEV) applications. In these systems, lithium-ion batteries are preferred for their outstanding characteristics and advantages: high power density, long life cycles and high efficiency. For high voltage applications, batteries cells are connected in series, raising the issue of voltage balancing among cells. This paper presents a new structure of active voltage balancing of Li-ion cells associated in series in battery stack. It is based on the use of micro-converters network. The principle of the charge equalization is to derive energy from an overcharged cell and to transfer it to an undercharged cell no matter whether the battery is currently in charge or in use supplying a load. The highlight of this structure is not only its high efficiency and its ease of implement but moreover, its integration capacity in contrast to state of the art passive and active balancing topologies. A monitoring system is required to perform forced balancing. The results from simulations and experimental test bench validate the feasibility and the interest of the proposed balancing circuitry and operating principle.

Experimental characterization of insulated gate power components: capacitive aspects

In this paper, the parasitic capacitive behaviour of insulated gate power modules (MOSFET, IGBT, MCT, etc.) is presented. First, a theory on nonlinear electrostatic quadripoles is developed. Secondly, based on this theory, an original experimental characterization method is presented. Results provide more information than manufacturer datasheets, which makes the method very interesting for designers. Finally, the influence of the two potentials V/sub ce/ and V/sub ge/ on capacitor values is analysed at turn on using a simple model of an IGBT.

Design and realization of highly integrated isolated DC/DC micro-converter

This paper deals with the design and the realization of an integrated isolated HF DC to DC converter for low voltage and low power conditioning applications (3,3V and 1W). It is based on the 3D integration of several elementary silicon dies in which have been integrated essential components such as the inverter, the rectifier, the HF transformer, the input and output capacitors and the output inductor. The paper deals with the silicon integration of all these elements, the presentation of our work being related with the state of the art. Then it focuses on a global estimation of the whole converter functional performances at 1MHz switching frequency. Practical but partial implementation was carried out. The inverter and the rectifier are designed in CMOS technology (Austria Micro Systems 0.35µm) and have been optimized to operate at high frequency (1MHz) in order to reduce the size of passive devices. We have integrated monolithically all is necessary for this function. The transformer as well as the inductor and the capacitors are also integrated on separate silicon dies. Their integration is discussed as well as their design and practical characterization. Based on all these pieces, the overall converter efficiency is estimated in simulation based on practical characterizations. It appears that correct efficiency with a reasonable silicon surface and volume can be reached.

Copper losses in power integrated inductors on silicon

One of the major goals in power electronics is the integration of the passive and active part of converters, on the same piece of silicon. In this context, our laboratory works on magnetic components integration. To have the right dimensioning of these components, we firstly have to choose the best topology regarding losses. The aim of this paper is to present a comparison between three circular topologies of integrated power inductors on silicon-regarding their copper losses. 2D FEA simulations have been made to compare the three topologies, and a complement of the Dowell method has been developed to obtain an analytical formulation of copper losses for the structure called 0LT in this paper (copper spiral sandwiched between two magnetic plates).

Analytical modeling of losses for high frequency planar LCT components

Passive components occupy a major part of the volume of power electronic converters. Therefore to increase the converter power density, designers have to carefully reduce the size of these components. The integrated planar inductor-capacitor-transformer, already known as LCT component can achieve this goal. Volume optimization of this component requires an accurate analytical modeling of overall losses (including magnetic, copper and the dielectric parts). However, common methods could not be used for high frequency planar components. In the first part of this paper, we introduce the principle and applications of LCT components. In the second part, we present an analytical electromagnetic and electrostatic modeling for high frequency planar components - the lumped elements equivalent circuit method. This method has been developed for components having simple geometries. The efficient application of this method to the complex geometry of LCT is showed in the third part.

Study of Techniques for Flip-Chip Bonding to Organic Substrates for Low-Power Applications

This paper deals with the study of technologies for flip-chip assembly of CMOS integrated power converters on standard FR4 organic substrates. Tests for the characterization of commercially available technologies for microassemblies, such as anisotropic adhesive bonding, thermocompression bonding, thermosonic/ultrasonic bonding, and solder bonding, are carried out. The aim of this paper is to determine the most suitable flip-chip bonding technology for power CMOS circuits with more than 50 pads. First, the coupled design of the CMOS chip and the corresponding substrate dedicated to low-power microconversion (10 W) is presented. It is shown that the parasitic resistances and inductances of the interconnections increase the conduction and switching losses of the device. This leads to a temperature rise, which can limit the operating ratings of the circuit. The experimental results are provided to evaluate each technology for flip-chip assembly.

Integrated low power low voltage isolated switch mode power supply

Dual Active Bridge converter is selected for the implementation of hybrid integration of isolated low power low voltage SMPS. Its architecture, as well as natural ZVS operation and limited amount of passive devices are convincing criteria for this type of application. Its design analysis shows outstanding ability to minimize passive elements while offering high efficiency levels, in the range of 90%. Details of active and passive device designs are given. The experimental results carried out upon the realization of specific CMOS chips and passive devices demonstrate the interest of such conversion structure for SMPS low power low voltage applications.