Zengfeng Di

Germanium movement mechanism in SiGe-on-insulator fabricated by modified Ge condensation

The movement of Ge during Ge condensation in SiGe-on-insulator (SGOI) fabrication is studied based on the competition between the diffusion of Ge atoms and accumulation of Ge atoms. The diffusion of Ge atoms overwhelms the Ge accumulation at the top thermal oxide∕SiGe interface, resulting in a flat Ge profile in the SGOI layer. However, the opposite result is found at the bottom SiGe∕buried-oxide (BOX) interface. The Ge diffusion towards the BOX is blocked because of the much smaller diffusion coefficient of Ge in the BOX than that in the SiGe layer. The Ge accumulation effects are more dominant than the diffusion of Ge, and so Ge atoms pile up near the BOX giving rise to an abrupt profile. The disappearance of the SiGe lattice structure near the SiGe∕BOX interface is also found in the sample oxidized for a longer time due to the reduction of the melting point of SiGe alloys with higher Ge fractions.

Vacuum electron field emission from SnO2 nanowhiskers annealed in N2 and O2 atmospheres

The field emission properties of SnO2 nanowhiskers were observed to change after annealing under O2 and N2. The electron current increased significantly from the sample annealed in N2 and the threshold field decreased from 3.17V∕μm of the as-grown sample to 2.59V∕μm of the annealed sample. The mechanism of the field emission enhancement was explored using Fourier transform infrared spectroscopy and x-ray photoelectron spectroscopy (XPS). The results reveal that after annealing in N2, the amount of Sn–O bonds decreased and N atoms were introduced onto the surface. The binding energies of Sn 3d and O 1s determined by high resolution XPS analysis show a shift of 0.55 and 0.47eV, respectively, toward the high energy side. This shows that the electron emission enhancement arises from a decrease in the work function. The changes in the field emission effect from the sample annealed in O2 are different and a possible mechanism is also proposed.

Thermal stability of diamondlike carbon buried layer fabricated by plasma immersion ion implantation and deposition in silicon on insulator

Diamondlike carbon (DLC) as a potential low-cost substitute for diamond has been extended to microelectronics and we have demonstrated the fabrication of silicon on diamond (SOD) as a silicon-on-insulator structure using plasma immersion ion implantation and deposition in conjunction with layer transfer and wafer bonding. The thermal stability of our SOD structure was found to be better than that expected for conventional DLC films. In the work reported here, we investigate the mechanism of the enhanced thermal stability. We compare the thermal stability of exposed and buried DLC films using Raman spectroscopy and x-ray photoelectron spectroscopy (XPS). Our Raman analysis indicates that the obvious separation of the D and G peaks indicative of nanocrystalline graphite emerges at 500°C in the exposed DLC film. In contrast, the separation appears in the buried DLC film only at annealing temperatures above 800°C. Analysis of the XPS C1s core-level spectra shows that the (sp3+C–H) carbon content of the unprot...

Fabrication of silicon-on-SiO2/diamondlike-carbon dual insulator using ion cutting and mitigation of self-heating effects

A diamondlike-carbon (DLC) layer was used to substitute for the buried SiO2 layer in silicon on insulator (SOI) to mitigate the self-heating effects in our previous study. However, we discovered drawbacks associated with the inferior Si/DLC interface, inadequate thermal stability as well as carbon-silicon interdiffusion at the Si/DLC interface that could hamper future application of this silicon-on-diamond structure to microelectronic devices. In this work, we introduced a silicon dioxide barrier layer between the Si film and DLC buried layer to form a silicon-on-SiO2∕DLC dual-insulator structure to tackle these problems. Cross-sectional high-resolution transmission electron microscopy reveals that the Si/insulator interface is atomically flat and the top Si layer has nearly perfect crystalline quality. The SiO2∕DLC dual-insulator layer retains excellent insulating properties at typical complementary metal oxide silicon processing temperatures. Numerical simulation reveals that the negative differential r...

Fabrication and mechanism of relaxed SiGe-on-insulator by modified Ge condensation

We have developed a modified technique to fabricate silicon–germanium on insulator (SGOI) starting with a sandwiched structure of Si∕SiGe∕Si. By means of oxidation and annealing, relaxed SiGe-on-insulator (SGOI) with a Ge fraction of 34% has been produced. Our results indicate that oxidation of the silicon cap suppresses Ge loss at the initial stage of the SiGe oxidation and the subsequent annealing process homogenizes the Ge fraction and also reduces Ge enrichment under the oxide. It is found that the strain in the SiGe layer is almost fully relaxed at high oxidation temperature (∼1150°C) without generating any dislocations and crosshatch patterns that are commonly observed on the surface of a relaxed or partially relaxed SiGe layer on bulk Si substrate.

Thermal annealing effects on the structure and electrical properties of Al2O3 gate dielectrics on fully depleted SiGe on insulator

The interfacial characteristics and electrical properties of as-deposited and annealed Al2O3 gate dielectric films fabricated on fully depleted SiGe on insulator are investigated. The surface morphology of the gate dielectric is observed by atomic force microscopy, and its physical thickness and structure are determined by high-resolution transmission electron microscopy. Assessment of the energy shifts of the interfacial components observed by high-resolution x-ray photoelectron spectroscopy shows that oxidation of Ge occurs readily at the growth temperature, leading to a mixture of Si and Ge oxides at the Al2O3∕SiGe interface. After annealing, the relative intensity of GeOx diminishes significantly, whereas the relative intensity of the Si suboxides or SiO2 increases, and especially, the formation of silicate is observed. The chemical state changes in the interfacial layer affect the flatband voltage (Vfb) and the density of the interfacial states.

Relaxation mechanism of SiGe thin film on SOI substrate

A different annealing method for the Si/SiGe bilayer fabricated on SIMOX wafer is proposed. After annealing for a short time, the Si/SiGe bilayer relaxes via the gliding motion of dislocations in the Si layer exclusively, leaving the top SiGe layer relaxed and mostly dislocation free. In addition, Ge does not diffuse into the top Si layer of SOI substrate to assist in the relaxation of the structure at the highest annealing temperature. At low annealing temperature, SiO2 is not expected to be viscous, and so the strain ratio is reduced in a linear fashion between 600°C and 900°C. When the annealing temperature becomes higher (for instance, 1000°C that is 58.5% of its melting point of 1710°C), the oxide can flow and the Si/SiGe bilayer behaves like a constrained thin foil slipping on the oxide. In this case, the strain ratio is dramatically reduced.