Zhi Ye

Eight logic states of tunneling magnetoelectroresistance in multiferroic tunnel junctions

We propose a theoretical model based on the concept of multiferroic tunnel junction. The model is capable of producing eight different logic states by combining the spin-filter effect and the screening of polarization charges between two electrodes through a general spintronic tunneling. The dependence of the conductance ratio with very large magnitude on electric polarization, exchange splitting, barrier width, and bias voltage is investigated. The result may provide some insights into the realization of octal data storage namely, the eight different logic states are used as octal code, which could lead to the tremendous increase of memory storage density.

Electrical properties of V-doped Bi3.15Nd0.85Ti3O12 thin films with different contents

Thin films of Nd3+-∕V5+-cosubstituted bismuth titanate, (Bi3.15Nd0.85)(Ti3−xVx)O12 (BNTV), were fabricated by chemical solution deposition technique. For different vanadium contents (x=0.03, 0.06, and 0.09), the crystallized phase and electrical properties of the films were investigated using x-ray diffraction, polarization hysteresis loops, leakage current-voltage, and capacitance butterfly loops. The authors found that increasing vanadium content leads to the decrease of coercive field and the increase of capacitance. The film of vanadium content x=0.09 exhibits fatigue-free and excellent leakage current characteristics with I=5.99×10−9A at applied voltage of 3V, which is much lower than that of Bi3.15Nd0.85Ti3O12 thin film [X. S. Gao and J. Wang, Thin Solid Films 515, 1683 (2006)]. The frequency dependence of the remanent polarization for the BNTV thin film was discussed.

Modeling of imprint in hysteresis loop of ferroelectric thin films with top and bottom interface layers

The imprint of a ferroelectric thin film capacitor is studied using an improved model consisting of two nonswitching thin interface layers near the top and bottom electrodes. The difference in electrical conductivity between the two interface layers induces voltage offset and deformation behaviors in hysteresis loops. Size dependence of shift effect of Bi4−xNdxTi3O12 thin film is explained qualitatively by taking into account the thickness ratio of the interface layer and the bulk film. Various shifts and anamorphic shapes with different electrodes and processes have been effectively reproduced through changing the layer conductivities. The simulated shifted hysteresis loops agree well with the experiment. Theoretical prediction based on this approach may provide a method to reduce imprint failure.

Simulation of polarization and butterfly hysteresis loops in bismuth layer-structured ferroelectric thin films

Modeling of the hysteresis loop of ferroelectric thin films has been thought very difficult owing to its nonlinear and history-dependent electric field effects. Here we extend the Preisach model [Z. Phys. 94, 277 (1935)] by using the distribution function integral and superposition method. The model shows improved hysteresis loop that agrees reasonably well with the experimental data measured from the bismuth layer-structured ferroelectric thin films. Compared with the previous model, the current model provides polarization-field (P-E) loop with full and symmetric shape, suitable coercive field (Ec), and few undesirable parameters. The butterfly loop of perovskite-type ferroelectric thin films is also simulated. Additionally, the approach is able to describe the unsaturated loops obtained under various ac electric fields, which is very useful in circuit simulation of ferroelectric field effect transistor or ferroelectric capacitor.

ELECTRICAL PROPERTIES OF METAL-FERROELECTRIC-INSULATOR-SEMICONDUCTOR CAPACITORS USING Pt/(Bi3.15Nd0.85)(Ti3−x V x )O12/ Y2O3/Si STRUCTURE

ABSTRACT The metal-ferroelectric-insulator-semiconductor capacitors, fabricated using Pt/(Bi3.15Nd0.85)(Ti3−x V x )O12/Y2O3/Si(100) structure, accommodate a Y2O3 thin film (20 nm) deposited on p-type Si(100) as an insulating layer, and a Nd3+/V5+-cosubstituted bismuth titanate, (Bi3.15Nd0.85)(Ti3−x V x )O12 film prepared by chemical solution deposition as a ferroelectric layer. The capacitors exhibit large clockwise capacitance–voltage memory windows of 2.0, 2.2 and 2.4 V, and low leakage current densities of 7.3 × 10−9, 6.1 × 10−9 and 5.5 × 10−9 A/cm2 at an applied voltage of 6 V for different vanadium contents of 0.09, 0.06 and 0.03, respectively. They are also characterized by good data retention, keeping the high and low capacitance values biased in hysteresis loops distinguishable for a period of over 14.6 days.

A novel design of 0.25μm2.5 V 2T-2C sensing scheme for FeRAM

A novel design of 0.25 μm 2.5V 2T-2C sensing scheme for FeRAM is proposed. The proposed scheme converts the voltage signals between the two bit lines to current signals and compares them using the current-sensing amplifier to realize magnify the read-out signals of 2T-2C FeRAM. The simulation of PSPICE shows that the new sensing scheme is more suitable for low voltage supply applications and the sensing speed is improved.