Zhi Ye

Zinc-Oxide Thin-Film Transistor With Self-Aligned Source/Drain Regions Doped With Implanted Boron for Enhanced Thermal Stability

Because of the rapid diffusion of hydrogen in zinc oxide even at a relatively low temperature, zinc-oxide-based thin-film transistors (TFTs) with hydrogen-doped source/drain regions suffer from degraded thermal stability. The use of boron, which is a heavier and a more slowly diffusing dopant, is systematically investigated as a replacement of hydrogen. Its effectiveness as a dopant has been studied in terms of a range of process conditions, including its implantation dosage and the subsequent heat treatment temperature, time, and ambience. The lowest resistivity of 2 mΩ-cm has been obtained at a boron dose of 1016/cm2. Self-aligned top-gated zinc-oxide TFTs with source/drain regions doped with implanted boron are shown to be more stable than those doped with hydrogen, even when subjected to the relatively high temperature needed for the formation of a good-quality passivation layer.

Characteristics of Thin-Film Transistors Fabricated on Fluorinated Zinc Oxide

Thin-film transistors fabricated on fluorinated zinc oxide have been found to exhibit improved electrical characteristics. The dependence of the extent of the improvement on the amount of fluorine, precisely controlled using ion implantation, is investigated. At a fluorine concentration of 1020/cm3, transistors with a relatively high field-effect mobility of ~60 cm2/V·s have been realized. The enhancement is attributed to the passivation of carrier traps by fluorine. Fluorine concentration in excess of 1020/cm3 is found to result in degraded transistor characteristics.

High performance AlScN thin film based surface acoustic wave devices with large electromechanical coupling coefficient

AlN and AlScN thin films with 27% scandium (Sc) were synthesized by DC magnetron sputtering deposition and used to fabricate surface acoustic wave (SAW) devices. Compared with AlN-based devices, the AlScN SAW devices exhibit much better transmission properties. Scandium doping results in electromechanical coupling coefficient, K2, in the range of 2.0%u2009∼u20092.2% for a wide normalized thickness range, more than a 300% increase compared to that of AlN-based SAW devices, thus demonstrating the potential applications of AlScN in high frequency resonators, sensors, and high efficiency energy harvesting devices. The coupling coefficients of the present AlScN based SAW devices are much higher than that of the theoretical calculation based on some assumptions for AlScN piezoelectric material properties, implying there is a need for in-depth investigations on the material properties of AlScN.

Impact of HfTaO Buffer Layer on Data Retention Characteristics of Ferroelectric-Gate FET for Nonvolatile Memory Applications

A p-channel metal-ferroelectric-insulator-silicon field-effect transistor (FET) with a 300-nm-thick SrBi₂Ta₂O₉ (SBT) ferroelectric film and a 10-nm-thick HfTaO layer on silicon substrate was fabricated and characterized. The device shows a nearly unchanged memory window of about 0.9 V after a 2 × 10¹¹-cycles fatigue test, an on/off current ratio of more than 10⁷, and a field-effect mobility of approximately 42 cm²/V · s. Moreover, a drain-current on/off ratio as high as 10⁵ was obtained with a fixed gate voltage of 2.5 V after over a 10⁵ -s elapsed time without any obvious degradation. These results may suggest that the Pt/SBT/HfTaO/Si FET is suitable for high-performance ferroelectric memory.

Characteristics of Plasma-Fluorinated Zinc Oxide Thin-Film Transistors

Plasma-immersion doping, a technique more compatible with the processing of large-area glass substrates, is investigated as a replacement of ion implantation for incorporating fluorine in a zinc oxide thin film to improve the electrical characteristics of the corresponding thin-film transistors. Since the average energy of the ions in a plasma is lower than that of the ions used for implantation, less damage is induced in the channel of a transistor by the bombardment of the ions. Consequently, enhancement-mode transistors with a relatively high field-effect mobility of ~71 cm2/V·s, a lower drain leakage current, and improved reliability have been realized.

Mechanism and Origin of Hysteresis in Oxide Thin-Film Transistor and Its Application on 3-D Nonvolatile Memory

Hysteresis in the current–voltage characteristics of a ZnO thin-film transistor (TFT) has been studied. Electric dipoles at the interface of the dielectric and the channel have been proposed as the agents responsible for the hysteresis. From experimental results and theoretical analysis, the water diffusing into the active layer is found as the main origin of the hysteresis. Based on this finding, devices free of hysteresis were obtained by using heat treatment and a passivation layer to control water diffusion in the fabrication process. Conversely, the hysteresis characteristics can be engineered so as to benefit the application of electronic memory. The function of the TFT device that serves as a memory element was also investigated and demonstrated in this paper. Owing to its low temperature process and simplified structure (compared with the FeRAM), 3-D stacked or even transparent nonvolatile memory would be its potential application.

High Precision Active-Matrix Self-Capacitive Touch Panel Based on Fluorinated ZnO Thin-Film Transistor

Matrix-addressed capacitive sensing is popularly employed in advanced multi-touch panels. While the number of simultaneous touch points of a passively addressed matrix is limited, the simultaneous touch points of an actively addressed matrix are constrained only by the size of the matrix and can be more densely packed. Since the touch panel is typically inserted between a display panel and the user, it would be the best if the transistors in an active-matrix touch panel are transparent. Reported presently is such a panel realized using a fluorinated zinc oxide transparent thin-film transistor technology. The technology can be applied to construct panels requiring high touch resolution, such as precision stylus pen-based writing, fingerprint sensing and sensing of the area of the touch, etc.

High stability fluorinated zinc oxide thin film transistor and its application on high precision active-matrix touch panel

We present fluorinated ZnO (F-ZnO) TFT to overcome the native drawback of pure ZnO TFT. At a optimum F concentration of ~1020/cm3, it exhibits high field-effect mobility of ~71cm2/Vs, low sub-threshold slope (SS) of 0.18V/decade, high reliability, good uniformity and light insensitivity, The improvement is attributed to the passivation effect of F. Based on the high performance F-ZnO TFTs, a novel active-matrix self-capacitive touch panel was firstly realized. This touch technology combined the functions of high precise stylus handwriting and sensitive multi-touch, which will be the trend of the development of the next-genaration high precision touch panel.

Investigation of phosphorus and arsenic as dopants in polycrystalline thin films of zinc oxide

The use of implanted phosphorus and arsenic has been systematically investigated and compared with implanted boron as n-type dopants in thin films of polycrystalline zinc oxide. For a given heat-treatment schedule and without fluorine co-doping, the steady-state resistivity of the phosphorus-doped ZnO is found to be consistently lower than that of the boron-doped ZnO. Both are in turn lower than that of the arsenic-doped ZnO. A resistivity of 3u2009mΩ cm has been obtained for a phosphorus dose of 1016/cm2, if activated at 500u2009°C for 5u2009min in nitrogen. Direct exposure to an oxidizing ambience during a heat-treatment resulted in an increase in the resistivity of the phosphorus- or arsenic-doped zinc oxide thin films. However, the kinetics of the oxidation and reduction of arsenic in zinc oxide are found to be significantly slower than those of phosphorus or boron. Thin-film transistors with self-aligned phosphorus-doped source/drain regions and channel-lengths as short as 2u2009μm have been realized and characterized.

Highly Stable Atomic Layer Deposited Zinc Oxide Thin-Film Transistors Incorporating Triple O 2 Annealing

Top-gate zinc oxide thin-film transistors have been fabricated by thermal atomic layer deposition, and the effective process steps to improve the device stability have been investigated in detail. In particular, the incorporation of triple rapid thermal annealing steps in oxygen ambient has been proposed to shift the turn-ON voltage toward the positive direction, reduce interface defects, and suppress gate leakage current. Such devices exhibited near zero turn-ON voltage and significantly enhanced electrical and environmental stability. Repeated <inline-formula> <tex-math notation=LaTeX>