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Dive into the research topics where Zhiliang Hong is active.

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Featured researches published by Zhiliang Hong.


IEEE Transactions on Consumer Electronics | 2003

Modified fast climbing search auto-focus algorithm with adaptive step size searching technique for digital camera

Jie He; Rongzheng Zhou; Zhiliang Hong

A practical real-time auto-focus algorithm for a digital camera is presented, and it improves the reliability and speed of the auto-focus process, especially suitable for a mega-pixel high definition camera. The proposed algorithm adopts threshold gradient and edge point count technique besides focus value function, instead of the traditional two-stage climbing search algorithm that uses the focus value function only. Additionally, a relative difference ratio circuit is also proposed, which can implement adaptive step size searching to increase the searching speed. By adopting the modified algorithm on the prototype of our mega-pixel digital camera, the real-time auto-focus function is verified. The proposed algorithm is implemented in a test camera chip that has been manufactured in 0.25/spl mu/m CMOS digital process.


IEEE Transactions on Power Electronics | 2010

A Dual-Mode Single-Inductor Dual-Output Switching Converter With Small Ripple

Weiwei Xu; Ye Li; Xiaohan Gong; Zhiliang Hong; Dirk Killat

Single-inductor dual-output (SIDO) switching converters always suffer from large ripple and severe cross-regulation problem, when a large inductor current is switched between two outputs. This paper proposes a novel fly capacitor method for SIDO converters to reduce the output ripple and spike. An adaptive common-mode control is presented to suppress the cross-regulation problem. A duty-ratio-based current estimation method is proposed to detect the load current, and the converter can automatically switch between pulsewidth modulation and pulse-frequency modulation modes. The two outputs of the converter are specified for 1.2 V/400 mA and 1.8 V/200 mA with input voltage ranging from 2.7 to 5 V. The chip has been fabricated on a 0.25-¿ m CMOS mixed-signal process. The conversion efficiency is 82% at a total output power of 840 mW, while the output ripple is about 20 mV and spike is less than 40 mV. The maximum overshot voltage during load response is 50 mV.


IEEE Transactions on Microwave Theory and Techniques | 2011

0.15-nJ/b 3–5-GHz IR-UWB System With Spectrum Tunable Transmitter and Merged-Correlator Noncoherent Receiver

Lingli Xia; Ke Shao; Hu Chen; Yumei Huang; Zhiliang Hong; Patrick Chiang

Carrierless impulse radio ultra-wideband (IR-UWB) radios have attracted significant research interest due to their low system complexity and power consumption. Unfortunately, IR-UWB systems suffer from the difficulty in controlling the transmitted spectral mask because of process, voltage, and temperature variations. In this paper, a monolithic 3-5-GHz IR-UWB transceiver is presented that integrates both amplitude and spectrum tunability, thereby providing adaptable spectral characteristics for different data rate transmission. The noncoherent receiver employs a simplified low-power merged correlator, eliminating the need for a conventional sample-and-hold circuit. After self-correlation, the demodulated data is digitally synchronized with the baseband clock. The 4 mm2 0.13 μm CMOS transmitter and receiver consume 2.2 and 13.2 mW, respectively at the data rate of 100 Mb/s. The measured peak-to-peak transmitted pulse amplitudes are 240, 170, and 115 mV, with a tunable frequency range of 3.2-4.1 GHz. The receiver exhibits a maximum gain of 70 dB, noise figure of 8.6 dB, and the input 1-dB compression point of -28 dBm . With off-chip antennas, the transceiver achieves a bit error rate of 10-3 at a sensitivity of -50 dBm.


international solid-state circuits conference | 2014

4.3 An 87%-peak-efficiency DVS-capable single-inductor 4-output DC-DC buck converter with ripple-based adaptive off-time control

Danzhu Lu; Yao Qian; Zhiliang Hong

Improving battery longevity in portable devices usually requires the use of different voltage levels with a wide range of load capability for various functional blocks. Since a single-inductor-multiple-output (SIMO) converter can support multiple output voltages while using only one inductor, it is an excellent candidate to minimize the component count and thus the production cost. However, the cross-regulation and power consumption are two main issues of the previously reported SIMO converters [1-5]. Although pseudo-continuous conduction-mode (PCCM) control with a freewheel period [1] tries to augment power density and eliminate cross-regulation, associated power dissipation of freewheel switch exacerbates its overall efficiency. The charge-control technique with energy recovery presented [2] decouples the output channels between each switching cycle, at the expense of additional switching loss and slow response. The comparator-based controlled SIMO converters are investigated in [3, 4] and the cross-regulation in most channels is improved due to the fast response of the comparator. However, since the channel that is last connected to inductor is inevitably regulated by the accumulative error of all channels to balance the overall inductor current, every load transition at other outputs will introduce serious cross-regulation [3] and load-regulation problem [4] in the channel. In addition, cross-regulation and slow response also limit the application of dynamic voltage scaling (DVS) technique, which is widely used in single-output converters to improve the system power efficiency by providing variable voltage with fast reference tracking.


international solid-state circuits conference | 2011

A 90% peak efficiency single-inductor dual-output buck-boost converter with extended-PWM control

Weiwei Xu; Ye Li; Zhiliang Hong; Dirk Killat

Power management in portable devices demands small size, low cost as well as long battery lifetime, which in turn drive the development of single-inductor multiple-output (SIMO) converters [1–5]. Due to the battery voltage variation during usage and the wide-range dynamic voltage scaling (DVS) applied for power reduction, high-efficiency buck-boost conversion is required to extend the battery lifetime. The buck-boost converter in [6] selects the operation mode by comparing the output with the supply voltage, which is not suitable for multioutput converters. The reported single-inductor dual-output (SIDO) buck-boost converter in [4] uses a state machine with sophisticated current sense for mode selection and requires a freewheeling state that dissipates energy. The converter in [3] uses one additional auxiliary inductor for step-up/down mode adjustment. This paper proposes an extended-PWM (EPWM) control which automatically selects buck or boost mode and facilitates smooth mode transition. It is suitable for flexible outputs and maintains a high efficiency in buck and in boost converters.


european solid-state circuits conference | 2009

Improved on-chip components for integrated DC-DC converters in 0.13 µm CMOS

Jinhua Ni; Zhiliang Hong; Bill Yang Liu

A fully-integrated DC-DC converter with on-chip inductors and capacitors is realized in a 0.13 µm CMOS technology. By using an asymmetric, high-Q inductor, power efficiency comparable to that of converters implemented with off-chip inductors is achieved. Straightforward analysis of high-density capacitor structure results in minimal ESR and optimal filtering of the output. The manufactured converter achieves a peak power efficiency of 80.5 % for an optimal load current of 170 mA and a voltage conversion ratio of 0.76 when switching at 180 MHz. This design is approximately 23 % more efficient than a linear regulator at a voltage conversion ratio of 0.55. A simple voltage mode PWM control keeps the output stable at the desired level, under load conditions from 0 mW to 720 mW.


custom integrated circuits conference | 2012

A near-threshold, multi-node, wireless body area sensor network powered by RF energy harvesting

Jiao Cheng; Lingli Xia; Chao Ma; Yong Lian; Xiaoyuan Xu; C. Patrick Yue; Zhiliang Hong; Patrick Chiang

A wirelessly-powered, near-threshold, body area network SoC supporting synchronized multi-node TDMA operation is demonstrated in 65nm CMOS. A global clock source sent from a base-station wirelessly broadcasts at 434.16MHz to all sensor nodes, where each individual BAN sensor is phase-locked to the base-station clock using a super-harmonic injection-locked frequency divider. Each near-threshold SoC harvests energy from and phase locks to this broadcasted 434.16MHz waveform, eliminating the need for a battery. A Near-VT MICS-band OOK transmitter sends the synchronized local sensor data back to the base-station in its pre-defined TDMA slot. For an energy-harvested local VDD=0.56V, measurements demonstrate full functionality over 1.4m between the base-station and four worn sensors, including two that are NLOS. The sensitivity of the RF energy harvesting and the wireless clock synchronization are measured at -8dBm and -35dBm, respectively. ECG Lead-II/Lead-III waveforms are experimentally captured, demonstrating the end-to-end system application.


biomedical circuits and systems conference | 2009

A 1.8-V 770-nW biopotential acquistion system for portable applications

Hui Zhang; Yajie Qin; Zhiliang Hong

In this paper, an ultra-low power biopotential acquisition system is presented. The proposed system contains a tunable band-pass amplifier, a VGA with strong capacitive driving capability and a successive approximation ADC. To make the gain and bandwidth programmable, a T-switch with huge cut-off resistor is utilized to eliminate the effect of low frequency doublets. An improved low kick-back noise low offset latch brings a significant power reduction to the SAR ADC. The design was implemented in 0.18 μ m CMOS process and consumes 770nW from a 1.8-V single supply. The analog front-end achieves a 193Hz to 407Hz programmable bandwidth, 41.5dB to 62dB tunable gain, 3.7μVrms (0.025Hz~200Hz) input referred noise, noise efficiency figure (NEF) of 3.1. The SAR ADC achieves 11.7-bit ENOB.


IEEE Transactions on Power Electronics | 2015

On-Chip Compensated Wide Output Range Boost Converter with Fixed-Frequency Adaptive Off-Time Control for LED Driver Applications

Lin Cheng; Jinhua Ni; Yao Qian; Minchao Zhou; Wing-Hung Ki; Bill Yang Liu; Guolin Li; Zhiliang Hong

An on-chip compensated wide output range boost converter with fixed-frequency adaptive off-time current-mode control is presented. The small signal characteristic of the boost converter with current-mode control is reviewed, and an adaptive current sensing technique is proposed to reduce the variation of phase margin at different output voltages. On-chip compensation is achieved with a Type II compensator. Adaptive off-time control is adopted for its fast response and no need for slope compensation, while its disadvantage of varying switching frequency is eliminated by the proposed off-time generator. The IC controller was fabricated in a 0.5 μm 2P3M BCD 40 V process. Measurement results confirm that an output range of 5.5 V ~ 36 V with an input voltage of 5 V is achieved. The switching frequency is fixed at 1 MHz with a variation of ±1%. The measured peak efficiency and maximum output power are 92.9% and 8.6 W, respectively. For a load step of 200 mA using a 3.3-μH inductor and a 20-μF output capacitor, overshoot and undershoot of the load transient responses are smaller than 1% of the output voltage.


IEEE Transactions on Very Large Scale Integration Systems | 2013

1-V Low-Power Programmable Rail-to-Rail Operational Amplifier With Improved Transconductance Feedback Technique

Shanshan Dai; Xiaofei Cao; Ting Yi; Allyn E. Hubbard; Zhiliang Hong

A low-power process-independent programmable transconductance rail-to-rail operational amplifier (OpAmp) is proposed. It employs an improved transconductance feedback loop that senses the transconductance (gmT) accurately and enforces it to be equal to the conductance of a reference resistor. Experimental results in a 0.13- μm standard CMOS technology under a 1-V power supply demonstrate a continuous programmable gmT range from 87 to 165 μA/V with minimum fluctuation of ±2.4% and programmable deviation less than 4.5% from the reference value. The OpAmp achieves a unity-gain bandwidth of 3.7 MHz with a 95-pF load while only consuming 187 μA of quiescent current. The figure of merit of the proposed OpAmp is 1879 MHz·pF/mA.

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Nan Qi

Oregon State University

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