Zhongyuan Cheng

A Novel Switching Sequence Design for Five-Level NPC/H-Bridge Inverters With Improved Output Voltage Spectrum and Minimized Device Switching Frequency

This paper presents a novel switching sequence design for the space-vector modulation of high-power multilevel converters. The switching sequences are optimized for the improvement of harmonic spectrum and the minimization of device switching frequency. Compared to other commonly used switching sequences, the output spectrum of the proposed design shows higher inverter equivalent switching frequency. Meanwhile, the device switching frequency is reduced by using a flexible switching pattern. The proposed switching sequence has been simulated and experimentally tested on a 5-level neutral point clamped H-bridge based inverter. The results from both simulations and experiments consistently verify the above-mentioned features.

A New Nested Neutral Point-Clamped (NNPC) Converter for Medium-Voltage (MV) Power Conversion

In this paper, a new voltage source converter for medium voltage applications is presented which can operate over a wide range of voltages (2.4-7.2 kV) without the need for connecting the power semiconductor in series. The operation of the proposed converter is studied and analyzed. In order to control the proposed converter, a space-vector modulation (SVM) strategy with redundant switching states has been proposed. SVM usually has redundant switching state anyways. What is the main point we are trying to get to? These redundant switching states help to control the output voltage and balance voltages of the flying capacitors in the proposed converter. The performance of the converter under different operating conditions is investigated in MATLAB/Simulink environment. The feasibility of the proposed converter is evaluated experimentally on a 5-kVA prototype.

A Capacitor Voltage-Balancing Method for Nested Neutral Point Clamped (NNPC) Inverter

A capacitor voltage-balancing method for a nested neutral point clamped (NNPC) inverter is proposed in this paper. The NNPC inverter is a newly developed four-level voltage-source inverter for medium-voltage applications with properties such as operating over a wide range of voltages (2.4-7.2 kV) without the need for connecting power semiconductor in series and high-quality output voltage. The NNPC topology has two flying capacitors in each leg. In order to ensure that the inverter can operate normally and all switching devices share identical voltage stress, the voltage across each capacitor should be controlled and maintained at one-third of dc bus voltage. The proposed capacitor voltage-balancing method takes advantage of redundancy in phase switching states to control and balance flying capacitor voltages. Simple and effective logic tables are developed for the balancing control. The proposed method is easy to implement and needs very few computations. Moreover, the method is suitable for and easy to integrate with different pulse width modulation schemes. The effectiveness and feasibility of the proposed method is verified by simulation and experiment.

A Virtual Space Vector Modulation Technique for the Reduction of Common-Mode Voltages in Both Magnitude and Third-Order Component

A virtual space vector modulation technique reducing both magnitude and third-order harmonic component of the common-mode voltage (CMV) in a two-level voltage-source inverter (VSI) is proposed in this paper. The presented method employs a set of virtual space vectors constructed from original stationary space vectors to conduct modulation. Since the created virtual vectors have the lowest instantaneous and zero average CMVs, both the magnitude and third-order harmonic component of the generated CMV are reduced, contributing to better overall CMV performance and common-mode filter design in VSI applications. Three variants of the proposed modulation method using different virtual space vector combinations are presented. The concept of the virtual space vector modulation technique demonstrated with two-level inverter in this paper can also be extended to multilevel inverters. Simulation and experimental results, as well as comparisons with existing methods are provided to verify the proposed technique.

A Novel and Simple Single-Phase Modulator for the Nested Neutral-Point Clamped (NNPC) Converter

The nested neutral-point clamped (NNPC) converter is a four-level converter topology for medium-voltage applications with interesting properties such as operating over a wide range of voltages (2.4-7.2 KV) without the need for connecting the power semiconductor in series, high quality output voltage, and less number of components in compare to other classical four-level topologies. The control and balance of the flying capacitors (FCs) of the NNPC converter can be done by different control techniques taking advantage of the large number of redundant switching states. This paper presents a simple single-phase modulator for the NNPC converter, which can be applied to each phase of a three-phase NNPC converter. The proposed simple technique can control and balance the FCs to their desired values. Performance of the proposed technique under different operating conditions is investigated in the MATLAB/Simulink environment. The feasibility of the proposed converter is evaluated experimentally.

PWM Strategies for Common-Mode Voltage Reduction in Current Source Drives

The common-mode voltage (CMV) in the motor drive system could damage the motor insulation and induce destructive bearing current. Various reduced CMV space vector modulation (RCMV SVM) methods have been proposed in both voltage source converter (VSC) and current source converter systems. Most of them reduce the CMV by avoiding the use of zero-state vectors. Recently, a zero-state vector selection strategy for CMV reduction in CSCs has been proposed, which allows the use of zero-state vectors and achieves reduced CMV without affecting the modulation index range and the harmonics performance of converters. This paper further investigates three possible zero-state vector selection strategies in RCMV SVM for current source drives where the PWM CSR and CSI are connected back to back. Among the three methods, Method 1 and Method 2 are suitable for CMV peak value minimization, while Method 3 is proposed for the average CMV reduction. These methods can then be considered for different types of drives (with or without isolation transformer) to reduce the insulation stress or to limit the resonance in the common mode circuit. Details of the three zero-state vectors selection methods are presented. Both simulation and experimental results are provided to verify their effectiveness.

A Flying-Capacitor Modular Multilevel Converter for Medium-Voltage Motor Drive

This paper presents a flying-capacitor modular multilevel converter (FC-MMC) based on series-connected submodules. It is intended for completely improving the performance of a medium-voltage motor drive system in the entire speed range especially at zero/low speed under rated torque condition. The proposed FC-MMC circuit is characterized by the cross connection of upper and lower arm middle taps through a flying capacitor in per phase leg. By properly controlling the ac current flowing through the flying capacitor, the power balance between upper and lower arms is achieved, leading to very small voltage ripples on submodule dc capacitors in the entire speed range from standstill to rated speed even under the rated torque condition. Meanwhile, no common-mode voltage is injected. Simulation results obtained from a 4160-V 1-MW model show that the proposed FC-MMC along with the proposed control method performances satisfactorily in dynamic and static state even when operated at zero/low speed. Experiments on a downscaled prototype also prove the effectiveness of the proposal.

An Active Cross-Connected Modular Multilevel Converter (AC-MMC) for a Medium-Voltage Motor Drive

This paper presents an active cross-connected modular multilevel converter (AC-MMC) based on series-connected half-bridge modules. It is intended for completely enhancing the performance of a medium-voltage motor drive system in the full speed range from standstill to rated speed under all load conditions. The proposed AC-MMC circuit is characterized by the cross connection of upper and lower arm middle taps through a branch of series-connected half-bridge converters, which have an identical voltage and current rating with the submodules in the upper and lower arms. This cross-connected branch provides a physical power transfer channel for the upper and lower arms. By properly controlling the amount of high-frequency current flowing through the cross-connected branch, the power balance between the upper and lower arms is achieved even at a zero/low motor speed under constant torque condition. Meanwhile, no common-mode voltage is introduced in the whole speed range. A control strategy with focus on submodule capacitor voltage control is also proposed in this paper to guarantee the normal converter operation. Simulation results obtained from a 4160-V, 1-MW model verify the feasibility of the proposal. Experiments on a downscaled prototype also confirm the validity of the novel circuit and the associated control strategy.

Input resonance investigation and LC filter design for PWM Current Source Rectifiers

The input LC resonance is a consideration in the filter design for Current Source Rectifiers (CSR). One challenge in this design is that the rectifier system can have a range of total equivalent line inductance on the CSR ac side due to the variable inductance from the power system. Furthermore, it is found in this paper that the CSR dc side circuit can also affect the input resonance. These factors may lead to an unexpected LC resonance on the CSR input side. One approach to address this issue is to increase the filter size. However, optimized design and performance cannot be guaranteed in this case. This paper investigates the input resonance of a pulse-width-modulated (PWM) CSR systematically and proposes a procedure for input filter design which can avoid the unexpected LC resonance on the CSR ac side. The proposed strategy results in a better system performance and less sensitivity to the source inductance from the power system. The designed methods are validated by the simulation and experiment results.

Common-Mode Resonance Suppression in Transformerless PWM Current-Source Drive

Among high-power pulse-width modulation (PWM) current-source motor drives, the transformerless structure using the integrated dc choke has been widely acknowledged with superior advantages. A typical challenge faced by such transformerless PWM current-source drive systems is the potential common-mode resonance excited by the common-mode voltage (CMV). Since the implementation of power factor compensation (PFC) at low motor speeds may increase the CMV in such drives, the common-mode resonance could be serious and further aggravates the CMV stress on the system. In this paper, the critical factors on the common-mode resonance are thoroughly investigated. Based on the investigation, a solution based on average-value-reduction (AVR) space-vector-modulation (SVM) is proposed to suppress the common-mode resonance while maintaining the PFC function. The investigation of common-mode resonance and the effectiveness of the proposed resonance suppression solution are verified through experiments on a transformerless PWM current-source drive system.