Zoltán Lajos Kis

Removing Roadblocks from SDN: OpenFlow Software Switch Performance on Intel DPDK

Software-Defined Networking (SDN) promises the vision of more flexible and manageable networks, but requires certain level of programmability in the data plane. Such a flexible, programmable data plane implementation is OpenFlow (OF) which these days is seen as primary model of SDN data plane. In this paper we focus on the limitations of OF in packet switching performance. We share some measurement results we collected using an OF 1.3 prototype based on Intels Data Plane Development Kit (DPDK) and we also describe some optimization ideas. While OF 1.0 can be implemented on high-speed Ethernet switch hardware it has certain disadvantages in the area of flexibility. On the other hand OF 1.3 offers good-enough flexibility, but the poor performance of OF 1.3 implementations seems to represent a roadblock to SDN adoption. In this paper we argue that contrast to the common view, the overhead of flexibility is relatively low. We also argue that the apparent difference between a programmable data plane and a state of the art layered data plane is not primarily due to flexibility itself, but because the lack of optimization in case of flexible implementations.

Cheap silicon: a myth or reality? picking the right data plane hardware for software defined networking

Software-Defined Networking (SDN) promises the vision of more flexible and manageable networks, but requires certain level of programmability in the data plane. Current industry insight holds that programmable network processors are of lower performance than their hard-coded counterparts, such as Ethernet chips. This represents a roadblock to SDN adoption. In this paper we argue that contrast to the common view, the overhead of programmability is relatively low. We also argue that the apparent difference between programmable and hard-coded chips today is not primarily due to programmability itself, but because the internal balance of programmable network processors is tuned to more complex use cases. These arguments are backed with calculations and real-life measurements.

Chord-zip: a chord-ring merger algorithm

Distributed hash tables have been thoroughly examined in terms of robustness, topology-awareness and routing efficiency. However the dynamic composition of distributed hash tables has been neglected or has been dealt with only out of necessity. Future Internet networking envisions interaction and cooperation of autonomous networks, which often result in network (de)compositions where merging of distributed hash tables should be taken into consideration. Chord-Zip, a novel algorithm has been developed to efficiently and transparently handle the merging of Chord rings - a distributed hash table type - to their applications.

Dataplane Specialization for High-performance OpenFlow Software Switching

OpenFlow is an amazingly expressive dataplane programming language, but this expressiveness comes at a severe performance price as switches must do excessive packet classification in the fast path. The prevalent OpenFlow software switch architecture is therefore built on flow caching, but this imposes intricate limitations on the workloads that can be supported efficiently and may even open the door to malicious cache overflow attacks. In this paper we argue that instead of enforcing the same universal flow cache semantics to all OpenFlow applications and optimize for the common case, a switch should rather automatically specialize its dataplane piecemeal with respect to the configured workload. We introduce ESwitch, a novel switch architecture that uses on-the-fly template-based code generation to compile any OpenFlow pipeline into efficient machine code, which can then be readily used as fast path. We present a proof-of-concept prototype and we demonstrate on illustrative use cases that ESwitch yields a simpler architecture, superior packet processing speed, improved latency and CPU scalability, and predictable performance. Our prototype can easily scale beyond 100 Gbps on a single Intel blade even with complex OpenFlow pipelines.

Scalable merger of chord-rings

In our previous work, we investigated how distributed hash tables – specifically chord-rings – can be merged in an efficient manner, thereby, supporting compositions of dynamic networks relying on DHTs as management substrates. As a result, we presented the chord-zip algorithm. In this paper, we present our investigations and findings on how the chord-zip algorithm can be parallelised in order to achieve scalability in the merger of chord-rings.