A. A. Del Barrio

A Distributed Controller for Managing Speculative Functional Units in High Level Synthesis

Speculative functional units (SFUs) are arithmetic functional units that operate using a predictor for the carry signal. The carry prediction helps to shorten the critical path of the functional unit. The average case performance of these units is determined by the hit rate of the prediction. In case of mispredictions, the SFUs need to be coordinated by the datapath control mechanism to perform corrections and to maintain the datapath in the correct state. Devising a control mechanism for correcting mispredictions without adversely impacting overall performance is the most important challenge. In this paper, we present techniques for designing a datapath controller for seamless deployment of SFUs in high level synthesis. We have developed two techniques based on two main control paradigms: centralized and distributed control. The centralized approach stops the execution of the entire datapath for each misprediction and resumes execution once the correct value of the carry is known. The distributed approach decouples the functional unit suffering from the misprediction from the rest of the datapath. Hence, it allows the remainder of the functional units to carry on execution and be at different scheduling states at different times. We tested datapaths utilizing both linear structures and logarithmic structures for speculative arithmetic functional units. Our results show that it is possible to reduce execution time by as much as 38% (33% on average) for linear structures and by as much as 37.2% (25% on average) for logarithmic structures.

Applying speculation techniques to implement functional units

This paper justifies the use of estimation and prediction of carries to increase the performance of functional units built with the replication of full adders while keeping a low area penalization. Adders and multipliers are the most representative modules in this group of functional units. The use of these design techniques allows the implementation of modules with performance improvements ranging from 20% to 50% with only an area overheads around 5%. These functional units are suitable for asynchronous circuits but they could also be introduced in synchronous circuits with speculative techniques. The basic idea consists in estimating the carry out from some parts of the functional units, allowing every part to operate independently and in parallel. These modules are connected to build bigger ones. Results from simulations show that for some applications it is possible to make predictions even more accurate that the bit-based estimation. Predictions have also the advantage they can be introduced in the multipliers design, whether estimators cannot. These predictions are similar to the ones used in the branch prediction in a processor.

Fast and effective CU size decision based on spatial and temporal homogeneity detection

High-Efficiency Video Coding (HEVC) is the latest video coding standard of the Joint Collaborative Team on Video Coding (JCT-VC). HEVC noticeably improves compression performance when compared with previous standards such as H264, and represents a major step forward in video compression technology. However, this improvement is achieved by increasing the complexity of the encoding process. HEVC employs a novel flexible quad-tree coding block partitioning structure that enables the use of large and multi-sized coding, prediction, and transform blocks. This system is more efficient but also more computationally demanding. In this article an optimized CU size decision algorithm is proposed to reduce the computational cost of quad-tree partitioning by means of spatial and temporal homogeneity analysis and classification, which are directly applied to the input image. If a CU is classified as spatially or temporally homogeneous the quad-tree recursive process is stopped. Furthermore, this image pre-analysis is performed using logic units and embedded hardware on a GPU, thus avoiding unnecessary waiting states, so the computational cost associated with this process is zero for the processor in charge of the encoding process. In comparison with the reference HM16.2 test model, the encoding time is reduced by up to 32.69%, with negligible quality loss and a maximum BD-Rate increase of 1.2% for low-delay P configuration.

HEVC optimizations for medical environments

HEVC/H.265 is the most interesting and cutting-edge topic in the world of digital video compression, allowing to reduce by half the required bandwidth in comparison with the previous H.264 standard. Telemedicine services and in general any medical video application can benefit from the video encoding advances. However, the HEVC is computationally expensive to implement. In this paper a method for reducing the HEVC complexity in the medical environment is proposed. The sequences that are typically processed in this context contain several homogeneous regions. Leveraging these regions, it is possible to simplify the HEVC flow while maintaining a high-level quality. In comparison with the HM16.2 standard, the encoding time is reduced up to 75%, with a negligible quality loss. Moreover, the algorithm is straightforward to implement in any hardware platform.

Area Optimization of Combined Integer and Floating Point Circuits in High-Level Synthesis

Many scientific applications rely on floating point arithmetic for the dynamic range of representations and require millions of calculations per second. Unfortunately, until recently, floating point units have not been included in ASICs due to their area requirements. The main problem relies on the small reusability degree of these functional units achieved by existing high-level synthesis tools and algorithms. However, this disadvantage can be overcome using new techniques that allow the internal reuse of floating point operators to execute different stages of every operation, and its partial reuse to efficiently compute other floating or fixed point operations present in the behavioural specification. In this paper, some techniques to overcome the restricted reusability of floating point operators are presented. These techniques allow the efficient allocation of floating point operations reducing not only the area of the final implementations but also the time employed in the design. An area optimization for the floating point multiplier is addressed as a case study.

Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis

A complete power-aware high-level synthesis algorithm is presented. It performs the schedule, resource allocation and binding of behavioral specifications. It overcomes the limitations of low-power algorithms and based on a bit-level timing model and a study of the target technology, tries to chain in the same cycle as many operations as possible. It also fragments the functional units, not the operations, for diminishing the required hardware. We also keep a minimum performance by estimating the cycle time while we are chaining operations. This way we obtain a reduction for both the static power and the dynamic one. We achieve an additional dynamic power reduction by studying the Hamming distance and applying partial or total commutative property. Experimental results on real circuits show great improvements in both power and energy consumption and performance over conventional low power algorithms.

Complexity reduction in the HEVC/H265 standard based on smooth region classification

Abstract High Efficiency Video Coding (HEVC) is the current encoding standard, and achieves greater compression efficiency than the previous ones. The main objective of HEVC consists in retaining the same quality while employing less than 50% of the bitstream size when compared with the previous H.264 standard. This has, however, been achieved by considerably increasing the complexity of the algorithm. In this article, we exploit certain regions with homogeneous texture, also known as smooth regions, which do not require complex processing. Hence, an HEVC flow based on this spatial homogeneity classification is proposed to accelerate the encoding process. For this purpose, several fast intra and inter prediction methods are presented. Furthermore, a subjective quality improvement of the entire video sequence is proposed. When compared with the reference HM16.2 test model, our experiments show that it is possible to reduce the encoding time by up to 77.9% with negligible quality loss and a maximum bitrate increase of 0.5%. When considering the common test conditions suggested by JCT-VT, the average BD-Rate increase is 0.58%, 0.87% and 1.02%, with an encoding time reduction of 40.5%, 25.3% and 25.4 for all intra, low-delay P and random access configurations, respectively.

Fast CU size decision based on temporal homogeneity detection

High-Efficiency Video Coding (HEVC) is the latest video coding standard of the Joint Collaborative Team on Video Coding (JCT-VC). HEVC noticeably improves compression performance when comparing with previous standards such as H264, providing a major leap forward in video compression technology. However this improvement is achieved increasing the complexity of the encoding process. In this paper an optimized CU size decision algorithm is proposed in order to reduce HEVC computational cost by means of temporal homogeneity classification, which is directly applied to the input image using a GPU.

4K-based intra and interprediction techniques for HEVC

HEVC/H.265 standard was released in 2013. It allows reducing by half the required bandwidth in comparison with the previous H.264 standard. This opens the door to many relevant applications in the multimedia video coding and transmission context. Thanks to the HEVC improvements, the 4K and 8K Ultra High Definition Video real time constraints can be met. Nonetheless, HEVC implementations require a vast amount of resources. In this contribution we propose intra and inter prediction techniques in order to diminish the HEVC complexity, while complying with the real time and quality constraints. The performance is noticeably increased when comparing with respect to the HM16.2 reference software as well as the x265 encoder, maintaining a similar quality too.

Pre-processing techniques to improve HEVC subjective quality

Nowadays, HEVC is the cutting edge encoding standard being the most efficient solution for transmission of video content. In this paper a subjective quality improvement based on pre-processing algorithms for homogeneous and chaotic regions detection is proposed and evaluated for low bit-rate applications at high resolutions. This goal is achieved by means of a texture classification applied to the input frames. Furthermore, these calculations help also reduce the complexity of the HEVC encoder. Therefore both the subjective quality and the HEVC performance are improved.